RD Team_Sr. IC Layout Engineer_資深IC佈局工程師 (新竹)

Job Summary:
Layout Engineer will work directly and indirectly with Design / CAD / Layout Manager in development of Mixed-Signal and Analog Integrated Circuits. Individual perform job professionally and independently. The following are the requirements for this job function.

Essential Functions:

• Chip Planning
• Project Schedule / Layout Schedule Estimation
• Device Placement on block level according to matching requirements
• Block implementations on Top Level
• Top Level connections
• Signal matching / sensitive nets shielding technique
• Chip power / ground planning
• Integration of Analog top with Auto-Placement-Routing
• Pad / ESD rule and routing / connection
• Database DRC & LVS verifications on either DIVA or Dracula basis
• Chip Tape-out in accordance with company’s Tape-out Procedure
• Positive Attitude

Qualifications:

• 6+ years Layout experience in Analog and/or Mixed-Signal Circuit Design
• Ability to do chip plan, estimate die size and project schedule
• Ability to resolve DRC & LVS data verification and tape out chip independently
• Familiarity with fundamentals of analog processes
• Experience with Cadence and/or VIRTUOSO tools preferable