Senior ASIC Digital Design Engineer – Interconnect & NoC
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Summary
Senior ASIC digital design engineer at Meta working on interconnect and Network-on-Chip design. Day to day involves driving micro-architecture and RTL design and verifying complex IPs for low-power hardware accelerators, SoCs, and custom silicon supporting machine learning and network acceleration.
Meta is seeking highly skilled Design Engineers to join our team. You will contribute to the development of advanced technology solutions, including machine learning and network acceleration. You will design, implement, and optimize low-power hardware accelerators, state-of-the-art SoCs, and custom silicon solutions that enable the next generation of devices and hardware. You will collaborate with researchers and engineers to design and verify complex IPs, drive micro-architecture and RTL desig…