Senior Backend Engineer - Physical Design Platform
Summary
Backend chip physical design engineer at Amlogic in Singapore, leading place-and-route work for advanced chip designs: collaborating with frontend teams on floorplanning, clocking and power planning, and driving PD flows from netlist to GDSII including P&R, verification, timing and reliability analysis.
AMLOGIC SINGAPORE PRIVATE LIMITED is seeking a seasoned professional to lead PLACE & ROUTE tasks for advanced chip designs in Singapore. You will collaborate with frontend design teams on floorplanning, clocking, and power planning, and drive backend PD flows from netlist to GDSII, including P&R, verification, timing, and reliability analysis.
The role requires a minimum of five years in Place & Route, hands-on experience with advanced technologies, and strong communication and self-motivation.
