Senior Design Verification Engineer – Physical AI Compute

You will develop and execute verification strategies for a Physical AI SoC, build SystemVerilog and UVM verification environments, define coverage goals, and verify compute engines, memory systems, interconnects, processors, DMA engines, and other SoC infrastructure. You will perform hardware/software co-verification, evaluate performance and real-time behavior, develop assertions and automated infrastructure, participate in emulation and FPGA prototyping, investigate bugs, and debug issues across hardware and software boundaries through post-silicon.

Responsibilities

• Develop and execute verification strategies for key portions of the SoC
• Build verification environments using SystemVerilog, UVM, C, C++, assertions, formal verification, and emulation
• Define verification plans, coverage goals, and correctness criteria
• Verify compute engines, memory subsystems, interconnect fabrics, control processors, DMA engines, and other SoC infrastructure
• Perform hardware/software co-verification involving firmware, drivers, runtime software, and operating system interactions
• Verify performance, latency, bandwidth, QoS, and real-time behavior under representative workloads
• Develop assertions, checkers, scoreboards, and automated verification infrastructure
• Participate in emulation, FPGA prototyping, and pre-silicon software bring-up
• Investigate bugs, perform root-cause analysis, and debug across hardware and software boundaries
• Perform post-silicon debugging and root-cause analysis
• Use AI-assisted verification workflows to improve productivity, quality, and coverage

Requirements

• 10+ years of experience verifying complex digital systems
• Computer architecture and microarchitecture
• SoC architecture and digital design fundamentals
• Low-power methodologies and verification criteria
• CDC, clocking, and reset verification
• SystemVerilog, UVM, C, and C++
• Assertions and coverage-driven verification
• Formal verification techniques and tools
• Emulation, FPGA prototyping, or pre-silicon validation
• Memory systems, interconnect fabrics, caches, DMA engines, processors, or accelerator architectures
• Complex system-level debugging
• Experience with safety standards such as ISO 26262, IEC 61508, IEC 61511, or ISO 13849
• AI, machine learning, or edge AI hardware
• Robotics, drones, autonomous vehicles, or industrial automation systems
• QoS, latency-sensitive, or real-time systems
• Hardware/software co-verification and system-level validation
• Performance modeling, profiling, and workload characterization

Benefits

• Equity participation
• Medical coverage
• Dental coverage
• Vision coverage
• Paid time off
• Flexible work arrangements