Senior Digital Backend Layout Engineer for ASIC P&R
Summary
Senior engineer designs and optimizes digital ASIC layouts using Place and Route tools to meet power, performance, and deadline targets.
E-Space, located in Saratoga, California, seeks a Senior Digital Backend Layout Engineer specializing in Place and Route to join their semiconductor engineering team. This role involves leading the backend flow of digital ASIC designs, optimizing layouts for power and performance, and ensuring compliance with strict deadlines. Candidates should have over 5 years of experience in digital backend design with knowledge of advanced processes and industry-standard tools. The position offers an attractive salary range from $140,000 to $200,000 based on experience and skills.