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NAVITAS SEMICONDUCTOR USA, INC.

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Senior Director, Package Design & Engineering

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Summary

Senior Director who owns the global package design and engineering roadmap for Navitas' GaN and SiC power semiconductor portfolio, leading package architecture, simulation, materials selection, qualification (JEDEC/AEC-Q), and OSAT manufacturing ramp from concept through high-volume production while building a global engineering organization.

Job Purpose

Navitas Semiconductor (Nasdaq: NVTS) is a next-generation power semiconductor leader driving innovation in gallium nitride (GaN) and high-voltage silicon carbide (SiC) technologies. Our products enable faster, more efficient power delivery across AI data centers, high-performance computing, energy and grid infrastructure, electric mobility, and industrial electrification.

We are seeking a Senior Director, Package Design & Engineering to lead package architecture, design, development and qualification across Navitas' GaN and SiC portfolio. This leader will define the package technology roadmap and guide global engineering execution for advanced discrete and power IC packages from concept through high-volume manufacturing.

The successful candidate will combine deep technical expertise in power semiconductor packaging, assembly processes, materials, simulation, reliability, and new product introduction with the leadership skills to build high-performing teams, strengthen OSAT execution, and deliver robust package platforms that meet performance, quality, cost, and schedule commitments.

Leadership Roles and Responsibilities

  • Own and execute the global package design and engineering roadmap for GaN and SiC products, aligned with product, technology and business priorities.
  • Build, lead, and develop a global organization spanning package architecture, design, materials, process development, simulation, qualification, and manufacturing readiness.
  • Lead package platform development from concept selection and feasibility through design freeze, qualification, safe launch, volume ramp, and post-release improvement.
  • Establish clear technical requirements, design rules, development methods, decision gates, and release criteria for package and IC programs.
  • Create a disciplined engineering culture centered on technical excellence, accountability, rapid learning cycles, data-driven decisions, and on-time closure of risks and actions.
  • Partner with Engineering, Reliability, Quality, Supply Chain, and Business Units to deliver integrated product solutions.
  • Lead technical engagement with OSATs, material suppliers, tooling vendors, equipment suppliers, external laboratories, and strategic technology partners.
  • Develop supplier capability and second-source strategies that improve technology access, capacity resilience, cost competitiveness, and continuity of supply.
  • Serve as the senior technical escalation point for package design, assembly, qualification, reliability, and manufacturing issues.
  • Represent Navitas in customer technical reviews and executive-level discussions involving package architecture, performance, reliability, manufacturability, and development risk.

Technical Roles and Responsibilities

  • Define and deliver advanced package architectures for power discretes and IC products
  • Lead package layout and design optimization for electrical parasitics, current density, thermal resistance, thermo-mechanical stress, isolation, creepage and clearance, reliability, manufacturability, and cost.
  • Guide electrical, thermal, electro-thermal, and mechanical simulation, including finite-element analysis, warpage and stress modeling, material-interface assessment, and design sensitivity studies.
  • Drive selection, characterization, and qualification of leadframes, substrates, die-attach and sintering materials, wires, ribbons, clips, molding and encapsulation compounds, housings, thermal-interface materials, and insulation systems.
  • Define robust assembly processes and process windows for die attach, sintering, wire/ribbon/clip bonding, flip-chip attach, molding, encapsulation, substrate attach, housing assembly, cleaning, curing, marking, and traceability.
  • Lead DFMEA, design reviews, tolerance analysis, DOE, process characterization, SPC, Cpk improvement, cost optimization, and technical risk mitigation activities throughout development.
  • Drive qualification planning and execution to applicable JEDEC, AEC-Q, customer, industrial, and internal requirements in partnership with Reliability Engineering.
  • Lead root-cause analysis and corrective action for package failures such as delamination, die-attach voiding, interconnect degradation, mold or housing cracking, warpage, moisture ingress, thermal overstress, isolation breakdown, and partial-discharge failures.
  • Own package documentation including requirements, drawings, bill of material, process flows, specifications, control plans, qualification reports, and release packages.
  • Establish package platform reuse and design-rule strategies that accelerate NPI while improving quality, development efficiency, and manufacturing scalability.
  • Work with Operations manufacturing team to ensure manufacturing readiness at OSATs through capability assessments, equipment and tooling readiness, pilot builds, safe launch, yield monitoring, capacity planning, and post-release improvement.
  • Advance technical capability through competitive benchmarking, intellectual property development, external partnerships, and selective adoption of emerging package and interconnect technologies.

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