Senior Engineer I, Process Engineering [CMP]

Role Summary

As a CMP Process Engineer, you will work with semiconductor CMP processing and analytical equipment to research, develop, optimize, and transfer polishing and post-CMP cleaning processes for advanced logic, memory, analog, power, and MEMS applications. You will design and conduct complex experiments, perform detailed data interpretation, and deliver robust processes that meet requirements for removal rate, uniformity, defectivity, planarity, and pattern-dependent performance (e.g., dishing/erosion). You will collaborate cross-functionally with R&D, product engineering, field/service, and customers to define requirements, execute demonstrations, and enable successful product adoption.

While you deliver creative and inventive solutions, technical publications and Intellectual Property (IP) generation are an essential function of this position. This posting is intended for applicants with 2+ years of industry experience in CMP process development, integration, or applications engineering.

Key Responsibilities

• Develop, qualify, and optimize CMP unit processes for FEOL/BEOL applications (e.g., SiC, STI, ILD, W, Cu, barrier/liner, low‑k, hardmask, advanced dielectrics) and advanced materials to balance planarity, selectivity, and defect control.
• Formulate and tune CMP consumables and process conditions, including slurry chemistry (oxidizers, complexing agents, corrosion inhibitors, pH control, abrasives, surfactants), pads, conditioners, and post-CMP clean chemistries to meet performance and yield targets.
• Drive improvements in critical CMP outputs including removal rate (RR), within-wafer non-uniformity (WIWNU), across-wafer uniformity, edge performance, dishing/erosion, scratch/particle levels, residue control, and corrosion mitigation.
• Design and conduct experiments using structured tools such as Design of Experiments (DOE) and Response Surface Methodology (RSM) to achieve stated objectives.
• Perform rigorous analysis of complex experimental output (e.g., RR maps, thickness/step height measurements, defect Pareto, metrology correlation, pattern density impacts, consumable aging effects).
• Establish and maintain process windows, control plans, and performance baselines; lead SPC and capability analyses (Cpk/Ppk) where applicable.
• Operate and troubleshoot CMP platforms and subsystems (e.g., platen/head mechanics, endpoint strategies, slurry delivery, pad conditioning, brush/PVA clean modules, filtration, temperature control).
• Lead structured root-cause activities using Ishikawa (fishbone), 5‑Why, and FMEA; partner with hardware, software, and service teams to define corrective actions and prevent recurrence.
• Utilize metrology and characterization techniques to evaluate CMP outcomes, such as profilometry, optical/laser thickness mapping, ellipsometry, AFM, SEM, and optical inspection/defect review.
• Develop and validate metrology strategies and sampling plans; correlate inline metrics with electrical/yield outcomes.
• Lead initiatives to reduce scratches, particles, residues, stains, corrosion, and delamination; optimize post-CMP clean and drying to prevent watermarking and pattern damage.
• Work with customers and marketing/product management to understand and define requirements, execute and document demonstrations, and translate device needs into CMP process solutions.
• Ensure successful product transfer by performing demonstrations, drafting process documentation, and training field/service personnel; travel up to ~20% may be required.
• Produce technical reports and contribute to technical papers, conference submissions, and IP disclosures related to CMP process, equipment, and integration improvements.
• May provide day-to-day oversight and coaching for supporting technicians and aides, including input into performance feedback and work prioritization.

Qualifications

Education

• Bachelor’s degree in Chemical Engineering, Materials Science, Mechanical Engineering, Electrical Engineering, Chemistry, or Physics. Master’s degree preferred.

Experience (2+ years)

• CMP process development / integration for semiconductor manufacturing (logic/memory/advanced packaging a plus).
• Slurry chemistry and consumables: abrasives, oxidizers, complexing agents, inhibitors, surfactants, pad/conditioner selection, slurry filtration/delivery, and post-CMP cleaning.
• Defectivity reduction and yield impact mitigation (scratch/particle/residue/corrosion control; cleaning and dry optimization).
• Metrology and surface characterization relevant to CMP outcomes (e.g., profilometry, ellipsometry, AFM, SEM/optical inspection, particle analysis).
• Structured problem solving using DOE, SPC, and root cause methods (Ishikawa, 5‑Why, FMEA).

Preferred

• Familiarity with pattern-dependent CMP effects (density, feature scale, dummy fill, microloading), and modeling approaches for planarity and WIWNU.
• Understanding of materials interactions in CMP (galvanic corrosion, electrochemistry basics, passivation, abrasive mechanics, pad glazing/conditioning dynamics).
• Knowledge of device integration requirements across FEOL/BEOL flows and their implications for CMP (selectivity, dielectric integrity, low‑k sensitivity, barrier integrity).
• Experience supporting remote customer sites, documentation for process transfer, and cross-functional programs (R&D ↔ manufacturing ↔ field/service).

Skills

• Ability to independently manage complex CMP development projects, including schedules, experimental planning, consumables procurement, and budget awareness.
• Strong technical judgment on interplay between tool hardware, consumables, and process outcomes (mechanics + chemistry).
• Demonstrated ability to develop and fully characterize CMP processes using first principles, DOE/RSM, and robust metrology.
• Excellent written and verbal communication skills; able to clearly present advanced technical constructs to internal stakeholders and external customers.
• Strong collaboration and influence skills across multidisciplinary teams (process, hardware, chemistry, metrology, integration, service).
• Commitment to EHS and safe handling of CMP slurries and cleaning chemistries; ability to implement/adhere to chemical safety protocols.
• Tool and system prototyping and collaboration with design and software engineering