Senior FPGA Engineer
This is a focused, senior RTL role that runs from architecture and RTL design through simulation, verification, and timing closure to FPGA bring-up and characterisation on the bench. You will own the FPGA design end to end and set the RTL standard for others to follow.
- Architect, design, implement, and verify FPGA RTL for high-speed digital, video, and optical-interfacing systems.
- Develop FPGA designs in VHDL or Verilog/SystemVerilog, including high-speed serial interfaces, video processing, framing, and on-chip instrumentation.
- Bring up and configure high-speed serial transceivers and clock-data recovery, and implement line coding, pattern generation, and error-rate instrumentation.
- Design digital video interfaces and the associated framing, timing, and data-handling logic.
- Develop functional verification: testbenches, simulation, and timing closure across multiple clock domains.
- Lead FPGA bring-up, debug, and on-board validation, resolving issues across the hardware and firmware boundary.
- Author and maintain RTL documentation, verification evidence, and coding standards, and contribute to design reviews.
- Collaborate across electronics, RF, photonics, and systems engineering, and support the path from prototype to product.
- Degree (BEng/MEng) or PhD in Electronic Engineering, Computer Engineering, Physics, or a related field, with substantial relevant experience at senior level.
- Strong FPGA RTL design in VHDL or Verilog/SystemVerilog.
- High-speed serial transceiver and clock-data-recovery bring-up, and serial protocols such as line coding and PRBS.
- Functional verification: testbench development, simulation, and timing closure.
- Sound clock-domain-crossing and high-speed digital design discipline.
- Digital video interfacing (for example HDMI) or comparable high-bandwidth digital protocols.
- FPGA toolchain proficiency, and a willingness to work across vendor toolchains as required.
- Schematic capture and high-speed PCB design using eCAD tools such as Altium.
- Knowledge of high-speed PCB layout techniques: controlled impedance, differential routing, length/skew matching, and power integrity.
- Signal-integrity simulation (for example HyperLynx, Ansys SI, ADS, or similar).
- Electronic interfacing to optical or other sensor/transducer devices.
- Test-and-measurement awareness — eye diagrams, error-rate measurement, and high-speed serial debug.
- A proven track record of delivering FPGA firmware into a product.
- Pension scheme
- Private medical & dental insurance
- 28 days’ holiday + bank holidays
- Relocation support
- Visa support available