Senior Physical Design Architect – FPGA Backend
Summary
Senior Physical Design Architect at Altera to implement FPGA/SoC backend flows from RTL to GDSII, optimizing performance, power, and area while improving PD automation.
Altera, a leading FPGA solutions provider, seeks a Senior Physical Design Engineer to drive backend implementation from RTL to GDSII for FPGA/SoC devices. You will work with architecture, CAD/EDA, and manufacturing teams to meet performance, power, and area goals while advancing PD flows and automation.
Ideal candidates have 10+ years in digital PD, strong scripting (Tcl, Python), and expertise with Synopsys and Cadence toolchains.