Senior/Principal Analog and Mixed Signal Circuit Designer for NAND Flash

Key Responsibilities:

• Responsible for the circuit design, simulation, and verification of key analog/mixed-signal modules for 3D-NAND memory, including but not limited to:

1. XDec / Page buffer / Datapath design and optimization;
2. High-Voltage (HV) Charge Pump / PUMP architecture design to meet multi-voltage domain, high efficiency, and low noise requirements;
3. High-voltage switch (HV Switch) and HV level shifter design to support >20V high-voltage operation;
4. I/O interface circuitry (including ESD protection, drive capability matching, and signal integrity optimization);

• Establish and maintain Verilog-A behavioral models of key modules for rapid system-level simulation and verification;
• Perform array-level mixed-mode simulation, proficient in using tools such as SPICE, Spectre, and HSPICE, and combining Verilog / Verilog-AMS for large-scale circuit verification;
• Collaborate closely with the device team to optimize circuit performance and reliability based on actual device characteristics (e.g., Fowler-Nordheim Tunneling, Band-to-Band Tunneling);
• Participate in the implementation of ECC (Error Correction Code) schemes, understanding the impact of encoding mechanisms such as BCH/LDPC on read/write circuits;
• Support the layout team in completing high-voltage circuit layout, ensuring compliance with DRC/LVS rules and high-voltage isolation requirements (e.g., NBL, Deep Nwell);
• Analyze and resolve analog circuit-related failures encountered in mass production, improving product yield and reliability.

Required Qualifications:

• Education: Master's degree or above
• Major: Microelectronics and Integrated Circuits, Semiconductor Devices, or related fields;
• Other Requirements:

1. 5+ years of experience in analog/mixed-signal circuit design, and experience in NAND Flash or other non-volatile memory (NVM) is a plus ;
2. Proficient in SPICE-type simulation tools (such as HSPICE, Spectre) and Verilog/Verilog-AMS, with experience in array-level large-scale mixed-signal simulation;
3. Proficient in Verilog-A modeling, able to build accurate and efficient analog behavior models;
4. Solid knowledge in analog/digital circuit design, able to independently solve physical and circuit technical challenges in NAND design;
5. Excellent cross-team collaboration skills, able to communicate effectively with device, process, digital, verification, and testing teams.