Senior Signal Integrity / Power Integrity Engineer
Summary
Senior engineer designing and validating high-speed signal and power integrity for optical communication and DSP platforms using PCB simulation and lab tools.
About the Role
We are seeking a Senior SI/PI Engineer to drive signal integrity and power integrity design, simulation, validation, and debugging for high-speed optical communication and DSP platforms.
Key Responsibilities
· Perform pre-layout SI simulations for high-speed interfaces including SerDes and optical DSP platforms.
· Define Substrate and PCB stack-ups, routing constraints, channel topologies, and materials to achieve signal integrity targets.
· Perform post-layout signal integrity analysis including insertion loss, return loss, crosstalk, impedance discontinuities, and channel compliance.
· Conduct power integrity simulations including DCIR drop, PDN impedance, transient current analysis, and decoupling optimization.
· Collaborate with hardware, package, substrate, and system teams to optimize chip-package-board performance.
· Support PCB reviews and provide routing guidelines to layout engineers.
· Develop and validate SI/PI simulation methodologies and best practices.
· Lead laboratory characterization using high-bandwidth oscilloscopes, VNA, TDR, and BERT equipment.
· Debug complex signal integrity, power integrity, EMI/EMC, and system-level issues.
· Generate simulation reports and present findings to engineering teams and management.
Requirements:
· Master's or bachelor's degree in electrical engineering, Electromagnetics, Communications Engineering, or related fields.
· 3+ years of SI/PI engineering experience in high-speed digital systems.
· Experience with servers, AI accelerators, networking systems, optical modules, or communication platforms.
· Strong understanding of transmission line theory, Maxwell equations, S-parameters, eye diagrams, jitter analysis, crosstalk, and reflections.