Silicon Emulation Engineer III
Summary
Build and optimize hardware emulation platforms for custom silicon at Google, integrating ASIC designs and third-party components to accelerate time-to-market for new devices.
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
The Platforms and Devices team encompasses Google's various computing software platforms across environments (desktop, mobile, applications), as well as our first party devices and services that combine the best of Google AI, software, and hardware. Teams across this area research, design, and develop new technologies to make our user's interaction with computing faster and more seamless, building innovative experiences for our users around the world.
- Build emulation models for ASIC designs at the SoC and IP level and strategize the emulation test platform.
- Understand third-party transactors (e.g., peripherals, multimedia) and integration.
- Support automation for emulation build and release. Triage and debug emulation test fails, work closely with design/verification teams, tool vendors.
- Support automation for emulation build and release. Triage and debug emulation test fails, work closely with design/verification teams, tool vendors.
Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
- 4 years of experience as a Emulation Architect/Software Engineer.
- Experience with one of the hardware emulation platforms (e.g., Palladium, Zebu, Veloce).
- Experience with coding (e.g., System Verilog, C++) and design.
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
- Experience in developing and bringing up emulation models.
- Experience in developing new transactors and hybrid emulation models.