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美商安科亞多有限公司台灣分公司

Silicon Test Engineer – ATE & SLT

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Description

About the Role
Axiado Corporation is seeking a Silicon Test Engineer with strong expertise in Automated Test Equipment (ATE) and System-Level Testing (SLT) to join our team. In this role, you will drive New Product Introduction (NPI) from early silicon bring-up through mass production, collaborating with a global, cross-functional team spanning design, test, foundry, and reliability. This position requires both deep technical capability and strong execution skills to successfully deliver across multiple concurrent programs.

Responsibilities
Develop, debug, and optimize ATE and SLT test programs for silicon validation and production.
Work closely with design, product, and validation teams to define and implement comprehensive test requirements.
Analyze test data to improve yield, performance, and reliability.
Develop and maintain test patterns and test methodologies for different device types.
Support JTAG, scan, boundary scan, MBIST and other digital/analog test interfaces.
Collaborate with hardware and firmware teams to ensure robust test coverage and effective failure debug.
Automate test data collection, analysis, and reporting to improve efficiency and scalability.
Provide failure analysis and debug support for both production and engineering samples.
Support new product introduction (NPI) and drive continuous improvement in test coverage, test time, and overall test efficiency.

Qualification & Experience
Bachelor’s or Master’s degree in Electrical Engineering or a related discipline.
5+ years of industry experience in semiconductor test engineering.
Hands-on experience with ATE platforms (e.g., Advantest).
Experience with System-Level Testing (SLT), functional testing, and system-level debug.
Proficiency in programming and scripting for test development (e.g., Python, C/C++, or equivalent).
Strong understanding of semiconductor test methodologies, test coverage, and data analysis.
Familiarity with JTAG, boundary scan, and protocols such as I2C, SPI, eMMC, USB, Ethernet, PCIe, and similar interfaces.
Experience in failure analysis, yield improvement, and test optimization.
Excellent debugging, analytical, and problem-solving skills.
Experience with data visualization tools for test analysis.
Working knowledge of Confluence and JIRA.

Skills

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