Silicon Validation Lab Engineer - SLT（工作地點: 板橋 )

JOB RESPONSIBILITIES:
● Support silicon-side hardware testing and extended data collection activities in SLT lab. To ensure continuous (round-the-clock) operation of test systems with minimum to no technical modifications, focusing on reliable data collection, monitoring, and test execution during day and night shifts.
● Follow detailed test instructions and standard operating procedures (SOPs).
● Execute predefined test cases, collect data across test and characterization procedures for silicon and hardware validation.
● Log and organize test results, anomalies, and observations accurately.
● Monitor ongoing test setups and ensure proper operation.
● Report equipment malfunction or test deviations immediately.
● Support 24×7 testing operations and cover night shift schedules.
● Handle lab equipment safely and maintain a well-documented environment.

MINIMUM QUALIFICATIONS:
● Bachelor’s or Diploma in Electrical, Computer, or Electronics Engineering or related fields.
● 2+ years of professional experience in deploying, maintaining robust test execution environments and hardware validation.
● Excellent written and verbal communication skills to collaborate with cross-functional teams.

PREFERRED QUALIFICATIONS:
● Experience working specifically within a semiconductor, silicon validation, or high volume manufacturing (HVM) environment.
● Direct experience with SLT hardware, software, or methodologies.
● Understanding of Statistical Analysis methods as applied to production yield data and quality control.
● Familiarity high-end SLT test system architectures.
● Knowledge of embedded software and hardware systems, Linux/Android environments.
● Experience with defect tracking, code and project management tools (e.g. git, JIRA).