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佳易科技股份有限公司

Sr. Analog Design Engineer/Manager

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Description

  • Experience in analog IP development that include SERDES, ADC, DAC, Audio

Codec, PLL, IO, memory, analog blocks and high speed PHY for 130nm, 90nm and
below technologies.

  • Knowledge in high speed PHY design (PCIE, USB, GbE, DDR, ETHERNET) is an

added advantage.

  • Preferably done some test characterization, measurement and compliance in

previous employment

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