Sr. Electrical Engineer
Description
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Experienced PD designer working on multiple technology nodes. 40/22nm analog, RF, and mixed/signal circuits will be an added advantage.
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Perform physical design from scratch, modify existing layouts. Create block level floorplans and work within the constraints of higher-level floorplans. Participate in peer and engineering reviews
Responsibilities
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Strong experience across synthesis, physical design, STA, DRC/LVS verification, and power analysis.
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Provide accurate area, power, and schedule estimates for assigned blocks, with a focus on optimizing PPA (Power, Performance, Area).
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Work closely with both design engineers and other layout engineers.
Required Experience and Skills
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We are looking for an experienced person (~7-10 years) who has overall knowledge of PD and takes care of all the flows associated with it.
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Apart from PnR & Synthesis: Experience with work closer to the front end such as digital modeling, gate level simulations, CDC, LEC, and STA/synthesis if possible.
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Floor planning: Strategically planning the placement of functional blocks on the chip.
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Placement and Routing: Optimizing the placement of components and connecting them with wires (routing).
Desired Experience and Skills
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Timing Closure: Ensuring the chip meets timing requirements (ensuring signals arrive at the correct time).
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Power Integrity: Managing power distribution and ensuring the chip operates reliably.
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Verification: Checking the layout for errors and ensuring it meets design rules.
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ECOs: Implementing design changes (ECOs) to fix issues identified during verification.