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Sr Engineer, Embedded Firmware

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Summary

Senior embedded firmware engineer at Ayar Labs in San Jose designing bare-metal C firmware to control high-speed SerDes interfaces and electronic/photonic subsystems in multi-chip packages — from architecture and control algorithms through silicon power-on, bring-up debugging, testing, and CI/CD-driven deployment.

Sr Engineer: Embedded Firmware

In this role, you will drive firmware design from inception to customer deployment, ensuring seamless hardware validation and integration. This is a unique opportunity to leverage your expertise in embedded systems, multi-chip package environments, and high-speed SerDes to shape the future of optical interconnect.

Essential Functions:

  • Design, develop, and optimize embedded firmware for controlling high-speed SerDes interfaces and electronic/photonic subsystems.

  • Collaborate closely with analog/mixed-signal, digital, and photonic block designers to develop and implement sophisticated control algorithms for our photonic circuits and establish the micro-architecture and embedded requirements for our multi-chip package systems.

  • Write unit tests and integration tests for firmware modules; participate in firmware code reviews; maintain high-quality firmware through CI/CD practices.

  • Develop and execute firmware test code to support initial silicon power-on and bringup activities; debug hardware-firmware interactions at first silicon.

  • Partner effectively with hardware, validation, systems, and software teams throughout the product development lifecycle.

  • Maintain clear technical documentation including APIs, firmware architecture documents, module specifications, and build/release notes

Required Qualifications:

  • Bachelor's in Electrical/Computer Engineering or a related field with 3+ years of relevant industry experience.

  • Proven expertise in bare-metal embedded firmware development, with strong programming skills in C.

  • Experience with various microcontrollers and firmware debugging tools.

  • Proficiency with modern version control workflows (e.g., Git), modern firmware development tools, and CI/CD tools.

  • Hands-on, proactive approach with the ability to thrive in a fast-paced, dynamic startup environment.

  • Silicon bring-up experience.

  • Experience in scripting with high level language like Python.

  • Experience with Make-based build flows.

Preferred Qualifications:

  • Ability to own architecture and development of firmware modules from scratch.

  • Experience in embedded firmware development for high-speed electronics and photonics applications.

  • Silicon bring-up experience for high-speed SerDes and photonics applications.

Principal Engineer: Silicon Validation

In this role, you will lead the silicon validation of our optical chiplets. You will define and drive the validation strategy from initial silicon power-on through block and chip level signoff. This is a rare opportunity to apply deep expertise in high-speed SerDes, photonic systems, and post-silicon validation to shape the future of optical interconnect for next-generation AI infrastructure.

Essential Functions:

  • Lead Validation Strategy: Define and implement comprehensive validation methodologies for our electronic-photonic SoCs, covering initial bringup, functional validation, electrical characterization, and system-level testing. Develop detailed test plans, success criteria, and select appropriate test equipment and methodologies.

  • Drive Silicon Bring-up: Lead first silicon power-on and bringup for new tape-outs, collaborating with firmware and design teams to establish operating conditions and validate core functionality from day one.

  • Own Block and System Validation: Execute rigorous post-silicon validation of SerDes interfaces, optical control loops, and mixed-signal blocks using industry-standard lab equipment (BERT, DCA, oscilloscopes, OSA, VNA).

  • Apply Standards and Best Practices: Draw on industry standards (IEEE, OIF, JEDEC, Ethernet/Optical MSA specs) and semiconductor validation best practices to establish rigorous validation targets, coverage objectives, and signoff criteria.

  • Root Cause and Debug: Investigate and drive to closure all silicon failure modes, from signal integrity issues to mixed-signal anomalies, using systematic debug methodologies and close collaboration with design and firmware teams.

  • Mentor and Lead: Provide technical leadership and mentorship to senior and junior validation engineers; guide the team's technical execution.

  • Deliver High Quality Documentation: Create and maintain comprehensive validation reports, signoff packages, and product performance documentation.

Basic Qualifications:

  • Bachelor's degree in Electrical Engineering or related field with 10+ years of relevant industry experience, or Master's degree with 7+ years of experience.

  • Demonstrated leadership in post-silicon validation for complex SoCs or multi-chip packages, including first silicon bringup and full signoff.

  • Hands-on expertise with high-speed SerDes validation and characterization (NRZ and PAM-4) using equipment such as BERTs, oscilloscopes/DCAs, and network analyzers.

  • Strong proficiency in Python for lab automation, data analysis, and test infrastructure development.

  • Experience developing and owning validation test plans end-to-end.

  • Deep understanding of communication protocols and standards (Ethernet, PCIe, etc.).

  • Excellent communication skills and ability to drive cross-functional technical alignment.

Preferred Qualifications:

  • Familiarity with optical transceiver standards and co-packaged optics integration challenges.

  • Knowledge of high-speed standards: Ethernet (200G/400G/800G), PCIe Gen5/6, OIF CEI.

  • Experience driving NPI and transition from lab validation to manufacturing test.

Sr Engineer: Silicon Validation

In this role, you will own the silicon bringup and validation of our optical chiplets. You will execute post-silicon bringup and characterization across SerDes, photonic, and mixed-signal blocks, building the test infrastructure and automation that ensures our products meet and exceed specification before customer deployment.

Essential Functions:

  • Perform initial power-on and bringup of new silicon tape-outs, including boot sequence validation, clock/power domain verification, and initial functionality tests.

  • Perform functional and electrical characterization of high-speed SerDes interfaces, photonic control blocks, and mixed signal blocks. Define and execute test plans at both block and chip level.

  • Use lab test equipment (BERT, oscilloscope/DCA, OSA, signal generators) to characterize signal integrity, eye diagrams, BER, jitter, and optical performance metrics.

  • Develop and maintain Python-based test scripts and automation frameworks for regression and characterization testing.

  • Systematically investigate silicon anomalies and failures; collaborate with design and firmware engineers to develop and verify fixes.

  • Write clear test plans, validation reports, and signoff documentation; communicate findings to cross-functional teams.

  • Partner with firmware, analog/mixed-signal, digital, and systems engineering teams across the full product development cycle.

Basic Qualifications:

  • Bachelor's degree in Electrical Engineering or related field with 3+ years of relevant industry experience.

  • Hands-on experience with post-silicon bringup and validation of high-speed SoC or mixed-signal devices.

  • Working knowledge of SerDes PHY operation and characterization, including NRZ and/or PAM-4 signaling.

  • Proficiency with lab equipment used for high-speed characterization: BERT, oscilloscopes, signal analyzers.

  • Proficiency in Python for test scripting and data analysis.

  • Strong troubleshooting skills and ability to work independently in a lab environment.

  • Proficiency with version control (Git) and software development environments.

Preferred Qualifications:

  • Experience with photonic device or electro-optic system characterization and validation.

  • Familiarity with optical measurement equipment (OSA, optical power meters, lasers).

  • Experience with high-speed serial standards: Ethernet (100G+), PCIe, OIF CEI.

  • Experience with board-level debug and hardware bring-up using JTAG or I2C/SPI interfaces.



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