Sr. Engineer, Test Hardware
Posted
Summary
Senior hardware engineer at Ayar Labs in Hsinchu, Taiwan, designing and building production and characterization test hardware — probe cards, load boards, and test circuitry — for the company's TeraPHY and SuperNOVA optical interconnect devices, working with ATE systems, foundries, OSATs, and vendors.
Sr. Engineer, Test Hardware
Location: Hsinchu (on-site)
Ayar Labs is shattering AI data bottlenecks by moving data at the speed of light. As pioneers of co-packaged optics (CPO), we are using light instead of electricity to move data faster, further, and with a fraction of the energy needed to fuel the explosive growth of AI models.
Backed by industry giants like NVIDIA, AMD, MediaTek and Intel and manufactured in partnership with the world’s leading semiconductor ecosystem, Ayar Labs’ co-packaged optics solution is key to unleashing next-generation AI scale-up architectures.
Responsibilities:
- Support HW projects requested by both San Jose and Taiwan Test teams.
- Design and develop Probe Cards and Load Boards for Production Test based on inputs from Design, Product, and Test teams.
- Design and develop small circuit boards and related hardware for Characterization Test based on inputs from Product and Test teams.
- Work with vendors to source high-quality fibers, fiber arrays, optical instruments, probe cards, load boards, circuitry, and other Test collaterals to support characterization and screening of TeraPHY and SuperNOVA devices.
- Drive vendor timelines to enable on-time delivery of Test collaterals.
- Support bring-up and debug activities related to hardware and collaterals in Lab, Foundry and OSAT environments.
- Maintain and support test equipment, including installing hardware and software.
- Provide hardware technical support to both internal teams and external customers.
- Provide lab support for Characterization Test hardware (rework, soldering, and troubleshooting).
Required Qualifications:
- BS + 2 years of experience in Electrical Engineering, Computer Engineering, or related field.
- Experience designing high-density multi-layer printed circuit boards (PCBs) and multi-layer organic (MLO) probe cards.
- Strong knowledge of how to read and use engineering mechanical drawings (Autodesk or similar), schematics, PCB layouts, and Bills of Materials.
- Experience using Cadence schematic and PCB layout tools (or similar EDA tools).
- Deep understanding of transmission line theory, impedance control, differential signaling, PAM4/NRZ channels, and RF signals.
- Good cross-team communication skills in both English and Mandarin.
- Located at Hsinchu and able to support domestic/international business travel within Asia and to the US.
Preferred Qualifications:
- Hands-on experience with Automated Test Equipment (Advantest V93K Exascale, Teradyne Ultraflex Plus), instruments, configurations, and board level design rules.
- In-field debugging experience for test hardware integration (wafer-level, die-level, package-level, or lab-scale).
- Experience using Python software to automate experiments and analyses.
- Knowledge of electro-optical device circuit design, testing, and validation.
- Fundamental understanding of semiconductor electronics, optics, and photonics.
- Experience using EM simulation tools (Ansys-HFSS / SI wave) for PDN optimization.
NOTE TO RECRUITERS:
Principals only. We are not accepting resumes from recruiters for this position. Remuneration for recruiting activities is only applicable subject to a signed and executed agreement between the parties. Please don’t send candidates to Ayar Labs, and do not contact our managers.