Staff Firmware Engineer

POSITION SUMMARY:
This position is responsible for developing and optimizing the Flash Translation Layer (FTL) for SSD storage solutions. Acting as the technical authority in the FTL and NAND management domain, this position leads the design of core algorithms—including logical-to-physical mapping, garbage collection, wear leveling, bad block management, and power-loss protection. As a Staff Engineer, this role will tackle complex system-level performance, resolve intricate data reliability issues, and provide technical mentorship to the firmware team. This role requires seamless cross-functional collaboration with frontend (NVMe/SATA) developers and hardware engineering teams to maximize the reliability of the storage product

PRINCIPLE DUTIES AND RESPONSIBILITIES:

• Leads the architecture design, development, and optimization of the FTL for SSD firmware.
• Implements and fine-tunes core algorithms, including Garbage Collection (GC), Wear Leveling (WL), mapping table management, and background data caching.
• Drives the resolution of complex data integrity issues, addressing NAND reliability challenges (e.g., read disturb, data retention, corner-case power cycle recoveries).
• Analyzes and optimizes FTL performance bottlenecks to improve sustained write performance, reduce Write Amplification Factor (WAF), and meet strict Quality of Service (QoS) metrics.
• Acts as a technical leader and mentors junior firmware engineers, conducting rigorous code reviews and driving engineering best practices within the backend team.
• Collaborates closely with the Frontend (PCIe/NVMe) team to ensure efficient data flow, and with Validation/QA teams to design customized tests for FTL corner cases and NAND endurance limits.