Staff Principal Advanced Packaging Engineer
You lead advanced semiconductor packaging architecture, technology strategy, and manufacturing execution. You drive chip-package-board co-design, review substrate layouts, manage suppliers, oversee signal and power integrity, thermal and mechanical reliability, resolve manufacturing issues, and take products from concept through mass production.
Responsibilities
- Define advanced packaging architecture and technology strategy
- Evaluate PPAC trade-offs across packaging technologies
- Lead chip-package-board co-design
- Engage with stakeholders, packaging design houses, and substrate suppliers
- Establish design rules, review processes, schedules, and quality standards
- Review substrate layouts and DRC and DFM compliance
- Assess supplier capabilities and technology roadmaps
- Lead signal and power integrity reviews
- Validate electromagnetic simulation results
- Drive thermal architecture and mechanical reliability strategies
- Oversee warpage, stress, thermal, and reliability modelling
- Lead packaging execution from NPI through high-volume manufacturing
- Resolve bumping, assembly, molding, and package integration issues
- Improve yield and resolve solder, bonding, and reliability issues
- Define reliability qualification strategies and lead failure analysis
Requirements
- Bachelor's degree or above
- Microelectronics or semiconductor engineering education
- Electronic and electrical engineering education
- Minimum 8 years of advanced semiconductor packaging experience
- High-volume semiconductor production experience
- High-layer-count FCBGA
- Cadence APD or Allegro
- Substrate layout review
- Signal integrity
- Power integrity
- PCIe
- SerDes
- DDR
- HBM
- Thermal modelling
- Mechanical reliability
- JEDEC reliability standards
- Failure analysis
- SAT
- X-ray
- FIB
- SEM
- Vendor management