SystemC/TLM Modeling Engineer (VDK Virtual Platform)

1._x0001_Develop functional IP models in SystemC/TLM to enable software left-shift
2._x0001_Design clean TLM interfaces and connectivity for reusable modeling
3._x0001_Integrate IP models into a Virtual SoC (vSOC) and support system bring-up
4._x0001_Build platform-level tests and regression to validate correctness
5._x0001_Improve productivity with tooling and CI/CD automation

Requirements

1._x0001_Strong C/C++ skills (modern C++ preferred).
2._x0001_Hands-on experience with SystemC and/or TLM-2.0 (LT modeling is acceptable; AT is a plus).
3._x0001_Understanding of SoC/IP concepts: memory-mapped I/O, interrupts, DMA, register maps, state machines.
4._x0001_Solid debugging skills (gdb, logs/traces, root-cause analysis).
Education: Master's Degree