【台北學生實習Internship】 NPU (Neural Processing Unit) Digital IC Architecture Design Engineer (DE)
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杰發科技股份有限公司 【台北學生實習Internship】 NPU (Neural Processing Unit) Digital IC Architecture Design Engineer (DE)
Description
開學後每周實體上班至少3天,須配合至少半年以上。
1. Design and architecture of Generative AI NPUs for high-performance and efficient AI acceleration
2. Memory subsystem design, including cache controllers and DRAM controllers
3. Interconnect and on-chip fabric architecture for scalable data movement and communication
4. Low-power design methodologies and power optimization techniques
5. High-speed interface design with cross-functional HW/SW co-design collaboration