Timing/EM signoff analysis engineer/technical manager

1 Develop the Timing/EM signoff criterion for leading process node and 3DIC.
2 Maintain the Timing/EM Signoff criterion ,provide issue solving and consultant for projects on abnormal/unfixable timing/EM violation
3 Develop new Timing/EM signoff methodology to be applied during chip synthesis/APR/STA/EM .
4 SPICE correlation for new timing/EM signoff criterion
5 Regression test for every signoff methodology by STA violation/slack analysis, EM results
6 Post-silicon data analysis for silicon-proven timing/EM signoff criterion