TSMC FinFET ASIC Backend Engineer - Tapeout & Signoff
Summary
SolGenie is hiring an ASIC physical design (backend) engineer in Lafayette, IN to lead tapeouts, signoff, and manufacturing handoff with TSMC and customers. Day to day involves running EDA tools in Linux, using basic scripting, and coordinating specs and timelines to ensure chips are manufacturable and fabricated on time.
SolGenie seeks an experienced ASIC Physical Design Engineer in Lafayette, IN to lead tapeouts, signoff, and backend processes with customers and foundries. You will collaborate across design, layout, and engineering teams to ensure manufacturability and successful fabrication, leveraging Linux environments and basic scripting.
Responsibilities include guiding design sign-off, using EDA tools, and coordinating with TSMC on specifications and timelines, while driving on-time delivery and