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信驊科技股份有限公司

資深數位IC設計驗證工程師 (高雄)

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Description

1. Develop and execute verification plans for SoC/ASIC/IP designs, including defining strategy, writing test plans, and architecting scalable verification environments.
2. Build and enhance UVM-based verification environments, ensuring reusability and maintainability of drivers, monitors, scoreboards, and checkers.
3. Perform constrained-random verification, analyze coverage metrics, and drive coverage closure with a strong emphasis on structured debugging and root-cause analysis.
4. Collaborate closely with RTL designers, firmware teams, and cross-functional partners to identify, debug, and resolve complex issues, demonstrating strong teamwork and communication.
5. Review design specifications, clarify requirements with stakeholders, and contribute to architectural discussions with a problem-solving mindset.

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