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Leads hardware asset compliance for OpenAI, designing end-to-end systems to track, verify, and govern hardware lifecycle (procurement, custody, transfers, retirement) across global operations, suppliers, and third-party custodians while improving data quality and financial controls.
Lead the design, testing, and integration of FPGA firmware for high-performance imaging systems, collaborating with hardware and software teams to meet manufacturing requirements.
Leads hardware testing for a video-sensor AI company, designing test systems, automating reliability/abuse campaigns, and closing feedback loops between field failures and product design—while building the team and culture around it.
Lead FPGA architecture and RTL development for real-time medical systems, guiding Verilog/SystemVerilog implementations, timing closure, and hardware bring-up in a regulated healthcare environment.
Lead a team to architect and implement FPGA-based signal processing systems for a space-based cellular broadband network, using VHDL/Verilog and Xilinx tools.
Lead backend ASIC implementation from RTL to tapeout, defining flows, optimizing PPA, and signing off DRC/LVS for advanced-node chips.
Design and optimize high-speed electronic systems for signal and power integrity using simulations and measurements to ensure robust, high-performance hardware platforms.
Lead hardware engineering for full-cycle miltech products, designing PCB schematics, selecting components, and shepherding prototypes to mass production.
Lead Signal & Power Integrity analysis for AMD’s commercial systems, balancing performance, power, and cost while guiding teams on best practices and tooling like Ansys, Sigrity, and Keysight.
Lead a team of electronics engineers to design and deliver power, analog/digital, and microcontroller-based circuits for Dyson’s new consumer appliances, ensuring compliance, reliability, and production readiness.
Lead a team designing CPLD/FPGA logic for server and storage products using Verilog/VHDL, I2C, SPI, and validation flows.
Lead hardware systems engineer designing and optimizing commercial food-recycling machines, focusing on thermal, fluid, and process engineering to reduce waste and improve efficiency.
Lead a team designing power electronics and PCBs for a satellite communications constellation, optimizing for cost, mass, and reliability at scale while ensuring buildability and performance.
Lead hardware board design and system engineering for Cisco’s Edge and Access routing products, shepherding designs from concept through production and validation.
Leads hardware systems architecture for mission-critical government projects, designing fault-tolerant, distributed hardware (e.g., FPGA/RF systems, GNSS receivers) and managing hardware-software interfaces across geographically dispersed sites.
Lead the integration of custom silicon (SoCs/ASICs) with firmware and software stacks, from pre-silicon planning through lab bring-up and system debugging for a next-gen satellite communications network.
Lead a team to design and deliver custom silicon for Apple’s display systems, collaborating with internal and external teams to architect, verify, and validate hardware for iPhone, iPad, and Apple TV.
Lead hardware validation and verification for automotive electronics in a global mobility project, coordinating test plans and cross-functional teams to ensure product quality and compliance.
Lead a team that designs and integrates the compute and sensor hardware for autonomous ground vehicles, working with OEMs and partners to bring rugged, scalable autonomy stacks to market.
Lead the design, build, and operation of high-fidelity Hardware-in-the-Loop (HIL) test environments for spacecraft and space infrastructure systems, using real-time simulation and avionics interfaces.
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