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Application close date: Applications will be accepted on an ongoing basis until the requisition is closed. At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We’re…
Within Amazon, Annapurna Labs team is building the next generation cloud server infrastructure. Our success depends on delivering world-class server infrastructure; we're handling massive scale and rapid…
OnSemi is seeking a Senior MTS Analog design Engineer, NEW PRODUCT DEVELOPMENT, Power Management, to join our growing team in Bengaluru, India. This group is responsible for development of Power management products…
Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment,…
About the Role Uber is launching AV Labs to accelerate the autonomous technology ecosystem. We're building out a high-velocity team of multi-disciplinary experts to turn real-world operations into high-quality data…
Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible…
Designs and implements automated test software for satellite hardware, integrating with flight and ground systems to validate components and support test operations.
Senior Software Engineer designs and implements automated testing software for satellite hardware, integrating with flight and ground systems while refining test plans for critical flight components.
Player-coach engineering manager leading the design and high-volume production of Hubble Network's satellite radio payloads — the RF hardware that decodes Bluetooth signals from orbit. Day to day: senior-level RF PCB and high-frequency circuit design, payload bring-up and test, plus managing RF/hardware engineers, quality processes, and contract manufacturers.
Senior Program Manager at Atoms, a Physical AI robotics company, who owns hardware issue management end-to-end in San Francisco: running intake and daily triage of hardware anomalies, administering and automating issue tracking in Linear, driving cross-functional issues to verified closure, and publishing status reports. Onsite five days a week with some travel.
A hands-on Senior Program Manager who owns the end-to-end hardware issue management process at Atoms — from intake and daily triage through tracking, verified closure, and reporting — for issues found in the lab, on the production floor, and in the field. Core tooling is Linear (administered via its GraphQL API and automations), plus SQL against fleet data, working onsite five days a week in San F
A Senior Digital Design Engineer at Astera Labs designs high-performance connectivity silicon for AI infrastructure, owning micro-architecture, RTL implementation, synthesis, timing closure, and IP integration for PCIe/Ethernet controllers, bridges, switches, and SerDes interfaces. Core tech includes SystemVerilog/Verilog, Synopsys and Cadence tools, and Python/Perl automation.
Verifies custom silicon (Edge-AI SoC) for Google's consumer and cloud hardware: building constrained-random verification environments in SystemVerilog/UVM, writing coverage, debugging with design engineers, and driving verification closure toward tape-out. Requires 8+ years of RTL/ASIC verification experience.
Overview Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission.…
Senior hardware engineer at AWS's Annapurna Labs defining, designing, and validating next-generation ML accelerator chips, cards, and server platforms, with ownership of PCIe and SerDes topics end to end. Day-to-day is electrical/functional design and characterization (PCIe Gen4+, SerDes, signal integrity), lab validation with scopes and VNAs, scripting test automation, and cross-team debugging wi
Design and integrate residential battery storage, inverters, and microgrid systems; validate hardware/software integration for safe, scalable energy solutions.
A 12-month inside-IR35 contract for a Senior/Principal FPGA Engineer in the UK aerospace & defence sector, designing, developing and verifying FPGA solutions alongside systems, hardware and software teams. Requires 3 days per week on site (multiple site options) and SC clearance eligibility.
Designs and develops high-performance circuit boards for quantum computing hardware, ensuring precision and manufacturability in a lab-focused R&D environment.
Senior Electronics Engineer on IonQ's Reliability Engineering team in Oxford (hybrid), root-causing and permanently fixing electronics and control hardware issues on operational trapped-ion quantum computers. Day-to-day spans triage, schematic capture, PCB layout, board/system-level testing, and deploying fleet-wide reliability upgrades using analogue, RF, and mixed-signal design skills with Altiu
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