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(Sr./Staff) ASIC Design Engineer
Key Responsibilities Key Responsibilities RTL Design and Verification Develop synthesizable RTL in Verilog/SystemVerilog for custom on-chip test, monitoring, and diagnostic IP targeting analog and mixed-signal failure…
(Sr./Staff) Digital Design Verification Engineer
Position Overview: As a design verification engineer, you will be part of a passionate verification team that is constantly pushing the limits – developing and deploying state-of-the-art verification methodologies in…
Sr. Staff Hardware Design Engineer, Rack Scale - Team Lead (AI Data Center)
Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: The Qualcomm Data Center AI System Hardware and Validation Engineering team develops…
Sr. Staff Hardware Design Engineer, AI Accelerators
Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm Cloud System Hardware and Validation Engineering develops cutting-edge rack level AI…
ASIC Digital Design, Sr Staff Engineer -19314
** The hiring manager is open to both Markham and Mississauga locations** We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We…
PCB Designer, Staff
Company: Qualcomm Technologies, Inc. Job Area: Engineering Services Group, Engineering Services Group > PWB Design General Summary: Qualcomm is a company of inventors that unlocked 5G & 6G, ushering in an age of rapid…
Staff SoC Design Engineer
Staff SoC Design Engineer at Quadric (Pune office) who owns SoC subsystem development, third-party IP integration (NoC, PCIe/UCIe, DDR, security), and PPA/timing-closure work on the company's General Purpose NPU for edge AI. Core tools: SystemVerilog/Verilog, VCS, and Verilog/C co-simulation.
Staff SoC Design Engineer
Staff SoC Design Engineer at Quadric, an edge-AI silicon company in downtown Burlingame, CA. You'll own SoC subsystem development and third-party IP integration (NoC, PCIe/UCIe, DDR, security), drive PPA optimization and timing closure through tapeout, and package designs for customer releases. Core stack: SystemVerilog/Verilog, VCS, Verilog/C co-simulation.
Hardware Engineer
About Perry Weather Perry Weather is the weather safety standard for organizations that operate outdoors. We combine on-site weather hardware with a software platform that automates alerts, siren activations, and…
Staff Engineer, RTL Design, AI Hardware
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify…
Staff Digital IC Design Engineer
Designs and verifies RTL digital blocks for power ICs: writes Verilog, implements custom interfaces (I2C, FSMs, register maps) and multi-clock-domain logic, and runs functional and FPGA verification while supporting synthesis and timing and mentoring junior engineers. Cadence tool experience is preferred.
ASIC Digital Design, Sr Staff Engineer
We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis…
Advanced Product Development Systems Staff Engineer – Hardware Cost and Weight Focal
Job Description Summary The Advanced Product Development (APD) Systems Staff Engineer will lead elements of the systems design and development for an Edison Works New Product Introduction (NPI) program NGP3 as an…
HW SOC/ASIC Physical Design Engineer, Senior/Staff (US Citizenship Required)
Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: Applicants selected will be subject to a government security investigation and must meet…
Staff Failure Analysis Engineer – Data Center Hardware
AMD Singapore is hiring a Staff Failure Analysis Engineer to perform system- and board-level failure analysis on data center CPU/GPU hardware, driving tests, collaborating with ASIC/firmware teams, and documenting root causes and corrective actions. Core stack: Linux, C/C++, Python, and strong debugging skills.