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Leads architecture design for autonomous driving hardware, balancing performance, safety, and cost while collaborating across engineering teams to define next-gen systems.
Design next-gen SoCs for autonomous vehicles, defining hardware specs and RTL while optimizing performance, power, and latency for Waymo’s compute platform.
Lead reliability engineering for Waymo’s LiDAR and other hardware systems, defining test plans, risk analyses, and vendor programs to ensure robust performance from prototyping through production and field deployment.
Senior physical design engineer at AMD leading the physical design team for new CPU core designs in Dublin or Cork, balancing Power, Performance and Area. Day-to-day work spans floorplanning, full-chip timing, DRC/LVS, physical design tools/flows, and building Agentic AI tools to boost team productivity.
Design high-voltage motor controllers and power electronics for an all-electric eVTOL aircraft, from schematics to production, using MOSFETs, SiC/GaN devices, and EMC testing.
A senior ASIC design engineer who designs, verifies, brings up, and debugs digital subsystems in electro-optical SoCs for Ayar Labs' co-packaged optics that move data for AI systems. Day to day: RTL in Verilog/SystemVerilog, testbenches, timing constraints and documentation, and Python-driven silicon bring-up.
Senior hardware/embedded engineer at Ayar Labs in Hsinchu designing embedded electronics and laser driver architectures (control loops, monitoring firmware) for co-packaged optics that move data for AI systems. Day to day: analog/digital schematic capture and PCB layout support, component integration, hardware bring-up and debugging, and cross-functional work with optics, packaging, and manufactur
Sr. Staff Engineer designing and debugging digital subsystems for Ayar Labs' electro-optical ASICs (co-packaged optics that move AI data over light). Day to day: writing RTL in Verilog/SystemVerilog, building testbenches, defining timing constraints, and doing silicon bring-up/debug with Python, C/C++, and firmware — on-site in San Jose.
About DZYNE DZYNE Technologies is leading the future of autonomous defense. Based in Irvine, California, we develop and manufacture advanced airborne and ground-based defense solutions deployed in over 50 countries.…
The Memory Technology Group is at the core of the Legacy Sandisk Engineering Organization. We are building a cutting edge 3D memory in our multiple billion dollars Fab. Our memory provides performance, power, and…
RELOCATION ASSISTANCE: Relocation assistance may be availableCLEARANCE REQUIRED FOR START: NoCLEARANCE TYPE: SecretTRAVEL: Yes, 10% of the Time Description At Northrop Grumman, our employees have incredible…
RELOCATION ASSISTANCE: Relocation assistance may be available CLEARANCE REQUIRED FOR START: Yes CLEARANCE TYPE: Top Secret TRAVEL: Yes, 25% of the Time Description At Northrop Grumman, our employees have incredible…
Design and develop automation services for large-scale data center server fleets, using Python or Go, while owning the full stack from requirements to deployment in a cloud-focused AI infrastructure company.
【募集背景】 EP（Embedded Processing Product Group）は、スマート家電、エネルギー計測、ビルオートメーション、車載エンドポイント機器向けに、RL78、RX、RA、RZといった幅広い製品ポートフォリオを展開し、安定した収益と高い収益性を実現しています。…
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The Staff Hardware Development Engineer will play a crucial role in our NI ON department. They will own the mechanical design process, collaborating closely with cross-functional teams to deliver cutting-edge optical…
Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to…
Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > ASICS Engineering General Summary: Hardware System Design Engineer, Senior Staff Location: San Diego, CA (100% On-Site)…
COMPANY BACKGROUND Epiq Solutions develops cutting-edge software-defined radio (SDR) products and processing solutions to enable spectrum dominance for maritime, land, air, and space domains. With 15 years serving…
Staff VLSI Design Engineer focused on analog IP design (voltage regulators, LDOs, charge pumps, oscillators) for non-volatile memory products at SanDisk, using EDA tools and collaborating with global analog teams.
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