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Lead digital design for power-management ICs, defining architecture, RTL, synthesis, and timing while collaborating with global teams to deliver high-efficiency converters for consumer, industrial, and automotive applications.
Design and lead analog IP blocks for power-management ICs (regulators, drivers, converters) using CMOS and Spectre/Simplis tools, collaborating with layout and validation teams.
Develops low-level C++ software for humanoid robots, interfacing with hardware to ensure high-bandwidth, low-latency control, diagnostics, and safety in warehouse/manufacturing environments.
#WeAreIn for jobs that impact everyone's life. Build the future nobody’s dreamed of yet... are you ready to rethink the impossible? As a Staff Digital Design Engineer in our Research & Development team,…
The Staff Analog Design Engineer will own the transistor-level design of high-speed SerDes transmit and receive datapath blocks for AI inference accelerators. This role involves the full design lifecycle from specification and simulation to silicon characterization using tools like Cadence Virtuoso, MATLAB, and Python.
Staff Analog Design Engineer responsible for transistor-level design of clocking subsystems in high-speed SerDes on IO chiplets, including PLL, DLL, phase interpolator, clock distribution, and CDR loop. Work spans design, simulation, verification, and silicon characterization using tools like Cadence Virtuoso and Spectre.
Lead RF/digital hardware sustainment for F-35 systems, defining test strategies and resolving complex issues while mentoring teams in a classified defense environment.
Drive end-to-end SoC physical design (RTL to GDSII) for low-power wireless connectivity chips using Synopsys and Cadence place-and-route and sign-off tools.
Lead schematic circuit design and PCB layout reviews, perform ARM-based CPU chip design and Linux embedded board bring-up, and handle signal/power integrity verification at a manufacturing site in Taiwan.
Lead physical design for advanced SoCs from RTL to GDSII, optimizing PPA and driving tape-out using Synopsys/Cadence flows while mentoring engineers.
Build functional and performance models for next-generation optical AI processors using C++ and Python, driving hardware-software co-design through simulations and analysis at multiple levels of scale.
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into…
About Analog Devices Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI,…
Role Overview We are looking for a highly skilled RTL Designer to develop high-performance, scalable, and power-efficient digital designs for next-generation SoCs and Chiplets targeting AI, HPC, and Networking…
Senior analog IC designer to own and develop power-management blocks (PMICs, DC-DC converters) for next-gen mobile and handheld devices, from spec to silicon bring-up.
Designs high-speed datapath and circuit blocks for 3D NAND flash memory, including page buffers and RTL logic, using Verilog and simulations to meet performance specs.
Maintain and deploy hardware assets, conduct preventative maintenance, and support customer training events in Tokyo.
Maintain and deploy hardware assets, calibrate equipment, and support regional training events for a global industrial technology company.
Lead the architecture and integration of next-generation connectivity platforms for GM vehicles, defining scalable hardware designs and guiding cross-functional teams through production and field deployment.
Lead the design, development, and delivery of vehicle electronic control units (ECUs) for Rivian, coordinating cross-functional teams and suppliers to meet program timelines and integration requirements.
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