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Hardware Engineer Intern contributing to FPGA development and hardware improvements at a global trading firm, using VHDL/Verilog and collaborating with trading and tech teams.
Designs and develops RF antennas (100MHz–8GHz) and active RF circuits for IoT devices, integrating components like LNAs and filters. Uses simulation tools (CST/HFSS), lab equipment (VNAs), and standards (5G/LTE/GNSS) to optimize performance, test prototypes, and support certifications.
The FPGA Design Engineer will develop and optimize complex FPGA designs for nanofabrication systems using Xilinx/AMD hardware. The role involves working in an agile team environment to support high-tech manufacturing technology.
The Hardware Engineer will be responsible for PCB layout, component placement, and routing while ensuring signal integrity and manufacturing compliance. The role involves preparing manufacturing documentation and collaborating with cross-functional teams to deliver reliable electronic designs.
Designs and integrates electronics for satellites, including PCBs, sensors, radios, and power systems, using Altium Designer and collaborating with software and mechanical teams.
Lead a team of IT analysts and support staff in delivering hardware solutions, managing installations, maintenance, upgrades, and providing technical support on a 3-month contract basis.
This role involves developing next-generation mobile robots for a company based near Cambridge, working closely with product owners and stakeholders to lead and contribute to various engineering projects.
Designs, builds, and maintains standardized electrical test hardware (DAQ, controls, power distribution, etc.) for aerospace/spacecraft testing, collaborating with cross-functional teams to ensure rapid, reliable deployment and troubleshooting of test assets.
OPENING DATE: August 24, 2026 CLOSING DATE: September 24, 2026 SERIES/GRADE: 0855/12 TYPE OF POSITION: Trust Indefinite (Non-Federal) DIVISION: Central Engineering LOCATION: Cambridge, MA AREA OF CONSIDERATION:…
Join us to drive the development of next-generation FPGA prototyping platforms. In this role, you will architect, integrate, and debug FPGA solutions while collaborating across hardware and software teams to enable…
Design and develop electronic hardware for safety-critical stairlift products, including PCB design, prototype testing, documentation, and mentoring junior engineers.
NextSilicon is reimagining high-performance computing (HPC & AI). Our accelerated compute solutions leverage intelligent adaptive algorithms to vastly accelerate supercomputers, driving them forward into a new…
At Kandou , we are redefining the economics of AI infrastructure. Our mission is to democratise AI by significantly reducing the Total Cost of Ownership (TCO) of hardware systems — a critical barrier to scalable…
Senior Staff SOC DFX RTL Design Engineer at AMD's Radeon Technologies Group responsible for planning and implementing DFX features (JTAG, Scan, Boundary Scan, Debug) for next-generation microprocessors, collaborating with architecture, IP design, and physical design teams.
RTL/SOC integration design engineer at AMD Hyderabad, responsible for ASIC design in sub-20nm nodes using Verilog/SystemVerilog, timing analysis, low-power design, and SOC verification tools.
Project Manager, Hardware coordinates Nex Playground’s hardware development from design to mass production, tracking schedules and logistics across engineering, manufacturing, and compliance teams.
FPGA Engineer role in the defence sector, developing complex FPGA platforms on-site across multiple UK locations. The posting is truncated so specific technologies are not detailed.
An ASIC digital engineer specializing in FPGA prototyping, emulation, and system-level debugging to support platform bring-up, hardware/software co-verification, and end-user collaboration.
Lead functional verification for complex IP blocks and SoC designs using System Verilog and UVM frameworks, focusing on NAND flash memory verification at Sandisk.
Senior Staff VLSI Design Engineer coding C++ and SystemC functional models and testbenches for memory/storage products, validating models using SystemC/SV/UVM, debugging firmware issues, and mentoring junior engineers.
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