Point your AI agent at freehire and let it find you a job. A CLI and an MCP server over the whole job API — no browser.
About Frame Security Frame is on a mission to build the future of Human Security in the AI era. With significant funding, a seasoned cybersecurity team building the right product, and a huge market opportunity, we are…
LOCATION: Fully Remote - FL, IL, KS, MI, OH, PA, TX, UT, & WI SCHEDULE: This position is set to run approximately 9 months. The set hours are 20 hours per week but are flexible within the Monday through Friday 9:00…
Akeyless Security provides a cloud-native SaaS platform that unifies Vaultless Secrets Management, Certificate Lifecycle Management, Next-Gen PAM, and Key Management. Trusted by Fortune 100 leaders and backed by…
We're hiring a Mobile Team Lead to own the AppHarbr SDK, GeoEdge's mobile division that gives publishers real-time control over ad quality across iOS and Android. About AppHarbr AppHarbr is GeoEdge's mobile…
Senior Network & Infrastructure Engineer owning site infrastructure and network operations for Wayve's Israel office, designing and maintaining networks (wired/wireless, VPNs, VLANs, firewalls), administering Linux systems, and automating with IaC tools like Terraform and Ansible.
We’re looking for an Account Executive based in Israel to join our sales team and play a key role in growing Jiga’s defense and aerospace business. The opportunity in Israel Manufacturing capacity is at the centre of…
This job is locate at: 814 Commerce Dr., Oak Brook, IL 60523 *This position sits in our Oak Brook support center, and requires availability to work evening and overnight shifts PLS®: People. Location. Service Why PLS?…
Leads the design and development of advanced semiconductor package architectures for high-performance AI connectivity chips, collaborating with cross-functional teams to optimize electrical, thermal, and mechanical performance from concept to production.
Junior engineer builds and runs test environments to verify next-gen AI connectivity chips using SystemVerilog/UVM and debugs hardware issues with design teams.
Designs and implements high-performance semiconductor chips for AI infrastructure, focusing on physical design flows, signoff, and automation in advanced process nodes.
Student role assisting senior engineers with physical design tasks for cutting-edge AI semiconductor chips, including synthesis, floorplanning, and verification using industry-standard EDA tools.
Designs high-performance digital blocks for AI infrastructure chips, using Verilog/SystemVerilog and EDA tools to solve data bottlenecks in semiconductor connectivity solutions.
Senior engineer builds and runs test environments to verify high-performance AI connectivity chips using SystemVerilog/UVM, ensuring flawless silicon for next-gen data centers.
Designs and implements top-level physical design for AI-focused semiconductor chips, collaborating with cross-functional teams to meet strict performance, power, and area targets.
Designs and automates chip design flows for semiconductor connectivity solutions, using Python, Tcl, and EDA tools to optimize RTL generation and hardware development.
Designs and implements advanced semiconductor packages for high-performance AI connectivity chips, collaborating with teams to optimize electrical, thermal, and mechanical performance from concept to production.
Senior/Staff STA Engineer at Astera Labs in Israel designs and signs off timing for high-performance AI connectivity chips, using EDA tools and SDC constraints to meet aggressive data-center targets.
Leads the full lifecycle of ASIC chip development for AI infrastructure, coordinating cross-functional teams to design, fabricate, and validate semiconductor solutions.
Designs power integrity and electromigration checks for AI-focused semiconductor chips, using tools like Ansys RedHawk and Cadence Voltus to ensure reliability in advanced FinFET nodes.
Principal Architect at Astera Labs in Tel Aviv designs high-performance AI connectivity solutions, focusing on PCIe, Ethernet, and advanced interconnect protocols like CXL and UALink.
We couldn't check your fit for this role — add a CV to your profile to see it next time.
