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Technical lead for RTL design of networking ASICs in Google's Server Chip Design team: defining block-level architecture, coding and debugging RTL (Verilog/SystemVerilog/VHDL), running simulations and Lint/CDC/FV checks, and participating in synthesis, timing/power, and silicon bring-up from spec to production.
You will design and implement components of an NPU communication software stack, including a collective communication library and driver. You will contribute to API and performance design across software and hardware…
Define multi-generation network architecture for Cerebras' AI accelerator systems: set scale-up network roadmaps, derive fabric requirements from AI/HPC workloads, and drive topology, protocol, and switch-ASIC decisions from modeling and simulation through implementation and qualification. Stack spans Ethernet, RDMA/RoCE, InfiniBand, PCIe/CXL, and NCCL/MPI.
5C DATA CENTERS Join the Future of Digital Infrastructure Are you a passionate HPC Systems Administrator looking to make a meaningful impact? We're building the next generation of digital infrastructure powering…
Who We Are Cotidal is building endless compute for humanity. We believe the current compute scarcity is a structural and enduring trend, not a passing shortage: demand for AI will outpace the world's ability to…
Own server-side platform architecture for Cerebras AI clusters: define server configurations and baselines (CPU, memory, PCIe, NIC, NVMe, BIOS/firmware), build capacity and performance models, benchmark and qualify vendor platforms, and support deployment debugging. Core stack is x86 servers, Linux, RDMA/RoCE networking, and C/C++/Python.
Cerebras Systems is hiring a Principal Network Security Architect (US and Canada) to own the architectural roadmap for enterprise, data center, and cloud networks — designing high-performance fabrics (spine-leaf, RDMA, EVPN/VXLAN), zero-trust segmentation, and an AI-agent-based network analysis framework, with AWS and Kubernetes at the core.
Lead RTL Design Engineer driving chip design from functional specification to synthesis, managing ASIC vendors, and debugging silicon-level issues. Core technologies include RTL, Python, TCL, and high-speed interfaces like PCIe and Ethernet.
Engineer the machines layer of Modal's serverless AI cloud: automate provisioning, imaging, monitoring, and repair of a global fleet of bare-metal and cloud hosts (GPUs, RDMA, networking, storage) so it stays healthy without humans. Heavy Linux internals, cloud, and cross-layer debugging work.
Leads AI workloads and AIOps tools for enterprise storage, defining roadmaps, collaborating with customers, and driving product success from strategy to GA.
As a Product Management leader (PLM, Director, or Sr. Director level), you will own and play a hands-on role in defining and driving Xsight’s product portfolio. In this role you will identify business opportunities…
At Cornelis we’re building the future of AI and HPC networking with an AI-first approach to silicon and software development. We’re seeking engineers who are energized by working on cutting-edge ASIC design and…
Overview The Azure Core Network Interface Cards (NIC) team designs, develops, and deploys multiple generations of Smart Network Interface Cards (SmartNICs) that deliver advanced hardware offloads, including Remote…
【团队与愿景】 我们是阿里淘天集团阿里妈妈广告技术部的核心基础设施团队（AI Infra）。在电商场景下，我们支撑着全球最复杂的广告召回、排序与机制策略业务。 这里不仅是算法的落地场，更是系统工程的深水区。我们管理着数百万 CPU 核与数万 GPU 卡的异构集群，致力于解决生成式大模型、超大规模稀疏特征（万亿级 Embedding）在工业界落地的极致性能难题。…
Cerebras is hiring a Network Systems Architect in Sunnyvale to define the scale-up (and scale-out) network architecture for its AI accelerator platforms — fabric topology, protocols, and switching — translating workload communication needs into measurable fabric requirements and driving specs through bring-up and qualification.
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions…
Job Overview We are seeking an experienced AI Solution Architect to design and lead end-to-end enterprise AI Factory and GPU infrastructure solutions spanning compute, high-performance networking, storage, Kubernetes,…
Designs, deploys, and maintains large-scale Linux infrastructure for AI/ML and enterprise workloads, focusing on bare metal servers, GPU clusters, and high-performance storage systems.
We're looking to looking to hire a VP of Systems Engineer - West Coast! VAST Data creating a new category of infrastructure: the Operating System for AI. We’re unifying storage, database, compute, and data services…
Project description We are looking for a C++ engineer to design and build high performance, low latency applications that process large volumes of real time data. You will work on systems where microseconds and…
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