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Microchip Technology

Engineer II - Design

NewBe an early applicant North America

Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment,…

CAD C++ LLM Neural Networks Python +3 skills

Staff Design Engineer

NewBe an early applicant HybridAPACStaff

Responsibilities As a creative design engineer with a strong understanding of subsystems and SoC Architectures, you will be part of a team responsible for developing advanced Subsystems & SoCs. You will work the…

Accessibility AI Perl Python Uvm +1 skills

edel.fa.us2.oraclecloud.com/CX_1

Principal ASIC Design

NewBe an early applicant HybridNorth AmericaFull-timePrincipal

Fortinet is looking for a passionate ASIC Designer to join our R&D team! As a key member of Fortinet’s ASIC design group, you will help architect and design our next-generation FortiASIC technology to accelerate the…

AI Asic Ethernet Fortinet FPGA +10 skills

FPGA Electrical Engineer I - Onsite

NewBe an early applicant On-siteNorth AmericaFull-time

Date Posted: 2026-10-23

 Country: United States of America

 Location: US-IN-FT WAYNE-150A ~ 1010 Production Rd ~ BLDG 150A

 Position Role Type: Onsite

 U.S. Citizen, U.S. Person, or…

Asic Embedded Systems FPGA SystemVerilog Uvm +2 skills

icfcjb.fa.ocs.oraclecloud.com/CX_1

Advanced Embedded Engineer

NewBe an early applicant On-siteNorth America

As an Advanced Embedded Engineer here at Honeywell Aerospace, you will be at the forefront of designing, developing, and debugging sophisticated embedded software and firmware solutions that power next-generation…

C++ Embedded Software Embedded Systems Firmware Microcontrollers +5 skills

Second Order Effects

Electrical Engineer

NewBe an early applicant North America

The Role: As an Electrical Engineer, you will support the design, architecture, and implementation of high performance electrical systems across a diverse range of projects. You will work alongside a collaborative team…

Altium Assembly Business Development C++ Firmware +8 skills

CHAOS Industries

Embedded SW/Firmware Design Engineer

NewBe an early applicant North AmericaFull-time

Designs and implements complex FPGA/RTL designs (Verilog/SystemVerilog, Vivado, Zynq/Ultrascale+/Versal) for CHAOS Industries' next-generation radar sensor products, covering the full FPGA lifecycle through timing analysis, hardware integration, and support of deployed systems. Full-time on-site in Hawthorne, CA.

Agile AI Bash Bitbucket CI/CD +19 skills

160K – 290K $

CHAOS Industries

Senior Embedded SW/Firmware Design Engineer

NewBe an early applicant North AmericaFull-timeSenior

Senior embedded SW/firmware engineer designing and implementing complex FPGA/RTL designs for CHAOS Industries' next-generation radar sensor products, integrating them with software systems and supporting deployed capabilities. Full-time on-site in Hawthorne, CA, working in Verilog/SystemVerilog with the AMD (Xilinx) Vivado toolchain and SoC FPGAs.

Agile AI Bash Bitbucket CI/CD +19 skills

160K – 290K $

Credo Technology Group

Senior Staff ASIC Design Engineer

NewBe an early applicant On-siteNorth AmericaStaff

Front-end ASIC design engineer responsible for RTL implementation and verification of complex logic blocks, supporting synthesis, DFT, STA, tape-outs, and chip bring-up at a high-speed interconnect semiconductor company. Core tech includes Verilog/SystemVerilog, Serdes, Ethernet, UVM, and timing analysis.

AI Analytics Asic Bash Ethernet +9 skills

160K – 230K $

Reliable Robotics Corporation

Sr. FPGA Design Engineer

NewBe an early applicant On-siteNorth AmericaFull-timeSenior

Sr. FPGA Design Engineer on the flight software team at Reliable Robotics, designing, simulating, synthesizing, integrating, and testing FPGAs for the flight computer and air-to-air radar in its aircraft autonomy stack. Core skills: VHDL/Verilog/SystemVerilog and industry-standard FPGA design, simulation, and synthesis tools.

Agile Asic Firmware FPGA Networking +4 skills

215K – 300K $

Alten Technology

Embedded Software Engineer

NewBe an early applicant North AmericaContract

Senior embedded software engineer at ALTEN Technology USA who designs, develops and debugs embedded control software for aerospace power electronics — 3-phase active rectifiers, motor control, DC-DC converters and AC drives — using C/C++ on DSP microcontrollers, with MATLAB/Simulink modeling, testing and DO-178 process documentation.

Assembly Bash C++ Embedded Systems Firmware +11 skills

115K – 130K $

Staff Digital Design Engineer

Open 130d North AmericaFull-timeStaff H-1B sponsor history

Designs, implements, and validates FPGA-based digital microarchitectures using Verilog/SystemVerilog for quantum computing systems in Palo Alto.

AI Fiber Firmware FPGA Rtl +2 skills

210K – 235K $

Celero Communications, Inc.

Senior ASIC Design Engineer - DSP/Analog/SerDes

NewBe an early applicant North AmericaSenior

Senior ASIC Design Engineer Celero Communications is an exciting and fast-growing semiconductor startup developing innovative technologies that power next-generation AI and data center infrastructure. Our products…

AI Asic Automation MATLAB Networking +8 skills

达摩院-Foundation IP 高级专家-计算技术

NewBe an early applicant APAC H-1B sponsor history

Senior Foundation IP design expert at Alibaba's DAMO Academy: designs and delivers full-custom circuit IP (standard cells, SRAM, IO, analog/mixed-signal blocks like LDO and PVT sensors) for high-performance computing chips, covering PDK interpretation, PPA optimization, library delivery (LEF/GDS/Liberty), and sign-off verification with SPICE, Calibre DRC/LVS, and PVT corners.

Bash Perl Python Tcl Verilog

达摩院-SoC高级芯片架构师-计算技术

NewBe an early applicant APAC H-1B sponsor history

职位描述： ● 负责SoC芯片架构定义、规划、优化。作为核心团队成员，专注于AI计算集群互连架构及AI芯片存储系统设计，定义AI加速芯片SoC级方案，确保方案的实用性和前瞻性。 ● 参与SoC时钟/复位/IO/互联/低功耗/可靠性/管理/调试等架构方案的制定 ● 与硬件、软件和系统团队合作，定义SoC的功能和接口规格 ●…

AI Ethernet InfiniBand PCIe QoS +1 skills

达摩院-SOC芯片设计专家-IOMMU方向

NewBe an early applicant APAC H-1B sponsor history

1. 负责 RISC-V IOMMU IP 的架构定义、微架构设计及RTL实现，确保满足芯片对设备内存的管理需求，满足项目PPA 要求。 2. 深入理解并实现 RISC-V IOMMU 架构规范，支持多级页表地址转换及权限管理，支持虚拟化扩展。 3. 负责 IOMMU IP 与 SoC 系统的集成，处理与 CPU、DMA、NoC 及 DDR 控制器的交互，满足 SoC 架构需求。 4. 主导 IP…

PCIe SystemVerilog Verilog

达摩院-Foundation IP 高级工程师/专家-计算技术

NewBe an early applicant APAC H-1B sponsor history

1. 负责基础工艺IP（Foundation IP）设计与交付，包括Standard Cell、SRAM、IO及其他数模混合 IP（如CML、LDO、PVT Sensor等） 2. 深入理解并解读Foundry PDK、工艺规则与特性，与工艺厂保持紧密技术协作，分析并解决与工艺波动、可靠性（EM/IR-drop/Aging 等）相关的设计挑战 3. 针对产品目标与工艺特性进行定制化电路设计，优化…

Bash Perl Python Tcl Verilog

达摩院-SOC IP 设计专家-计算技术

NewBe an early applicant APAC H-1B sponsor history

AI SoC前端设计工程师，专注于高性能IP设计与优化。该职位将参与SoC关键IP设计、优化和集成，推动AI SoC的高效能、高安全性与低功耗设计。 1、负责AI SoC关键IP设计，负责RTL设计与优化，确保IP的高效实现，满足PPA（性能/功耗/面积）需求 2、参与IP设计验证，制定测试计划，支持功能验证和性能优化 3、与SoC架构团队合作，定义IP功能需求和SoC级集成方案…

AI SystemVerilog Verilog

达摩院-SoC芯片设计专家-计算技术

NewBe an early applicant APAC H-1B sponsor history

● 负责SoC架构定义，IP 选型，RTL 设计及编码实现，SoC集成等工作。 ● 设计SoC时钟/复位时钟/低功耗/调试等方案。 ● 协同物理设计工程师进行SoC 性能/功耗/面积评估和优化工作。 ● 协同验证工作师进行SoC验证工作。 ● 电子、计算机等相关专业，硕士及以上学历，8年及以上SoC前端设计经验，5年以上SOC集成经验。 ● 输入理解前端ASIC设计流程。 ● 扎实的RTL逻辑设计及编码能力。 ●…

Credo Technology Group

Sr. Staff Design Engineer

NewBe an early applicant On-siteNorth AmericaStaff

Team Credo is seeking a Sr. Staff Design Engineer to drive both hands-on digital ASIC design and strategic architecture direction for our High-Performance Network Interface IP portfolio. This role has direct impact on…

AI Analytics Asic Bash Ethernet +12 skills