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Sr. Electrical Design Engineer, Laser Powder Bed Fusion Printers (Raptor)
SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this…
PCB Designer (Starship)
Design and layout advanced PCBs for SpaceX’s Starship avionics, partnering with hardware engineers to optimize high-speed, RF, and power electronics for spaceflight.
Sr. PCB Designer (Starship)
Designs complex multi-layer PCBs (20+ layers) for SpaceX’s Starship program, collaborating with hardware engineers to create high-performance electronics for space missions, including radio phased arrays and power converters. Focuses on signal integrity, manufacturability, and automation.
New Graduate Engineer, Software (Starship)
Entry-level (2027 graduates) software engineer on SpaceX's Starship program at Starbase, TX: designing, developing, and testing flight software and the simulations that validate it, working across the full stack (application, OS, networking, firmware, simulation) alongside hardware teams. C++/Rust systems programming experience is preferred.
Sourcing Manager, Rack Components, Electronics (Starlink)
SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this…
New Graduate Engineer, Software (Starship)
New-graduate software engineer on SpaceX's Starship team: designs, develops, and tests software that controls and simulates flight systems across the full stack (application, OS, networking, firmware, simulation). Key skills are systems programming in C++ or Rust and real-time embedded or distributed computing experience.
Manager, IT Infrastructure (Storage, Compute, & Virtualization)
Hands-on manager role leading SpaceX's IT infrastructure team that designs, builds, and operates enterprise compute, virtualization, and storage platforms (VMware vSphere, Hyper-V/KVM, NAS/SAN/object storage) supporting engineering, production, and mission workloads, covering capacity planning, backup/DR, automation, and vendor management.
Network Engineer (Starlink)
Network engineer on SpaceX's Starlink team in Redmond, WA: operates and expands Starlink's global ground network — POPs, interconnections, and co-location sites — while improving performance and reliability, supporting large customers, and automating network devices. Core tech: routers/switches/firewalls, DWDM/optical fiber, Linux, Python/bash.
Physical Design Engineer (Silicon Engineering)
SpaceX is hiring a physical design engineer to develop next-generation ASICs for the Starlink satellite and ground network. Day to day this means running synthesis, floorplanning, place-and-route, and timing/signoff closure (STA, noise, EM, IR drop), plus building physical-design automation scripts, using RTL2GDSII flows, EDA tools, and Python/TCL/Perl scripting.
Physical Design Engineer (Silicon Engineering)
SpaceX's Starlink team in Austin, TX is hiring a Physical Design Engineer to build next-generation ASICs for satellite and ground internet infrastructure. The role covers RTL-to-GDSII physical implementation — synthesis, floorplanning, place and route, and STA/signoff closure — plus developing physical design automation scripts (TCL, Python, Perl).
Network Engineer, AI Infrastructure (Starshield)
SpaceX's Starshield team is hiring a network engineer to design, build, and operate the Top Secret data center network supporting national security missions, including AI clusters at 100k+ GPU scale. Daily work spans high-speed optical/copper interconnects, routing/switching (BGP, OSPF, VXLAN), network automation and provisioning tools, performance optimization, and security.
Sr. Network Engineer, AI Infrastructure (Starshield)
Senior network engineer who designs, builds, and operates the Starshield data center network backing national-security AI clusters at 100k+ GPU scale. Daily work spans high-speed copper/optical interconnects, routing/switching (BGP, OSPF, VXLAN, MPLS), network automation/ZTP tooling, security, and Top Secret data center operations.
Site Reliability Engineer (High Performance Computing)
Runs SpaceX's shared high-performance computing platform as a product: keeping Linux clusters, storage, and user-facing services reliable through infrastructure as code, observability, automation, and a sustainable incident process. Core stack: Linux, IaC (Ansible/Terraform), Prometheus/Grafana, Python, containers/Kubernetes, HPC schedulers.
Electrical Design Engineer – Raptor 3D Printers
SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this…
Software Engineer (Components)
Software engineer on SpaceX's Components Engineering team, writing test/automation software, hardware drivers, web interfaces, and firmware (mostly Python) for testing and manufacturing rocket components like valves, avionics, and actuators used on Starship, Raptor, Dragon, and Falcon. On-site in Hawthorne, CA, working cross-disciplinarily with hardware teams.
Sr. Software Engineer (Components)
Senior software engineer on SpaceX's Components Engineering team building test automation, factory automation, hardware drivers, web interfaces, and firmware (primarily in Python/C) for testing and manufacturing rocket components like valves, avionics, and actuators for Starship, Raptor, Dragon, and Falcon.
New Graduate Engineer, Software (Starfall)
New-grad software engineer on SpaceX's Starfall team designing and implementing software and firmware for next-generation avionics: writing C/C++ for processors and microcontrollers, bringing up and validating space-flight devices, analyzing bugs, and supporting launch operations. Open to class of 2026/2027 grads; no aerospace experience required.
FPGA/ASIC Design Engineer (Silicon Engineering)
Designs next-generation ASICs and FPGAs for SpaceX's Starlink satellite and ground network, taking chips from architecture through RTL design in SystemVerilog/Verilog, optimization, implementation, and lab bring-up/validation. Core skills: RTL design, SoC integration, EDA tools, and scripting with Python/C++.
Sr. ASIC Design Engineer (Silicon Engineering)
Senior RTL design engineer on SpaceX's Silicon Engineering team in Irvine, CA, developing next-generation ASICs for the Starlink satellite and ground network. Day to day: defining micro-architecture, implementing Verilog/SystemVerilog RTL, supporting synthesis/timing closure, and participating in silicon bring-up and validation.
Sr. ASIC Design Engineer (Silicon Engineering)
Senior RTL/ASIC design engineer at SpaceX in Austin, TX developing next-generation ASICs for the Starlink satellite broadband system. Day to day: define micro-architecture, implement and integrate Verilog/SystemVerilog RTL, drive synthesis/timing closure with the implementation team, and support silicon bring-up and validation.