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Hardware Lab Engineer at Astera Labs in San Jose sets up and maintains test environments for silicon validation of AI connectivity solutions like PCIe, CXL, and Ethernet, using high-speed test equipment and Python automation.
Leads a team to design test strategies for high-speed PCIe switch chips using advanced 2.5D/3D packaging, ensuring manufacturability and quality for AI infrastructure components.
Design Verification Intern at Astera Labs working on silicon engineering for high-performance compute and networking standards using RTL design languages like Verilog and SystemVerilog.
Develops firmware and microcontroller subsystems for AI connectivity hardware using C/C++, Python, and RTOS, debugging with JTAG and lab tools in Vancouver.
Electrical engineer on Apple's iPad System EE team in Shenzhen, owning logic board and flex circuit design, power distribution, bringup/debug/validation, and factory NPI support from concept to ship.
Develops embedded firmware in C for STM32 microcontrollers, debugs board-level issues with oscilloscopes, and collaborates with hardware teams on motor-control systems for industrial and aerospace applications.
Principal firmware engineer designing and validating server SoC firmware for Azure’s next-gen hardware, enabling silicon bring-up, debug, and cross-team collaboration.
At Kandou , we are redefining the economics of AI infrastructure. Our mission is to democratise AI by significantly reducing the Total Cost of Ownership (TCO) of hardware systems — a critical barrier to scalable…
We are looking for an Embedded Software Engineer to join a defense tech project on a full-time contract basis. The project involves building low-level software for embedded platforms with on-device AI acceleration.…
Design, develop, deploy and maintain embedded software for IoT/Smart valve solutions, integrating hardware and cloud features, leading an on-site team in Cebu using C/C++, RTOS, ARM/STM32 MCUs, and IoT protocols.
Designs, tests, and debugs electrical subsystems for MacBook Pro computers, collaborating with cross-functional teams on PCB layout, power systems, and high-speed interfaces.
Our Solution Engineering division is seeking a skilled verification engineer to develop testbenches and test suites to join our diverse team. Arm’s hardware is at the heart of the computing and connectivity revolution…
Design, develop, and optimize embedded Linux software—BSPs, device drivers, kernel modules, and boot loaders—on NXP i.MX95 ARM-based SoCs using Yocto/OpenEmbedded, C/C++, and low-level debugging tools for high-reliability aerospace and defense systems.
Job Summary: This entry level/early career professional, applied technology position creates software that is sold as an integral part of Cummins’ products. People in these positions have involvement in identification…
Location: Krakow, Lesser Poland, Poland Job ID: R0137884 Date Posted: 2026-08-03 Company Name: HITACHI ENERGY SERVICES SP. Z O.O. Profession (Job Category): Engineering & Science Job Schedule: Full time Remote: No…
The Senior Platform Software Engineer will design and maintain low-level Linux-based software for embedded systems, working directly with hardware prototypes and lab equipment. The role focuses on C programming and system-level integration to support satellite, Wi-Fi, Bluetooth, and cellular technologies.
System Software Engineer (Kernel) Description - The Systems Software Engineer (Kernel) is tasked with developing advanced solutions for HP's commercial PC portfolio. This role encompasses leadership in the design,…
Overview Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering ( SCHIE ) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission.…
To design, develop, and maintain high-quality embedded firmware to support robust, scalable, and reliable products. Contribute to the full product lifecycle from concept through production, ensuring firmware aligns…
Principal engineer designing and verifying custom silicon chips for Microsoft's cloud infrastructure, using C/C++, SystemVerilog, UVM, and Python to ensure hardware quality and performance.
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