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Build and validate AI agents and DevOps workflows to automate hardware validation, debug SOC bring-up issues, and optimize AMD’s product delivery pipeline.
Drive the product vision and strategy for AMD’s client hardware portfolio, collaborating with cross-functional teams to deliver roadmaps that meet market needs and exceed customer expectations.
Senior Electrical Engineer designing and debugging cloud compute server systems and PCB boards, leading architecture, schematics, and production testing.
ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us. And…
Lead compiler and performance optimizations for AI training and inference on AMD GPUs, working with MLIR, LLVM, ROCm, and ONNX Runtime to improve compute efficiency and scalability.
Architect and lead formal verification strategies for complex ASIC designs, guiding teams to ensure silicon quality for next-gen processors and I/O technologies.
Owns the business and go-to-market strategy for AMD’s Adaptive RF SoC product lines, engaging customers and internal teams to drive new product introductions and adoption in aerospace, defense, and wireless markets.
Designs and verifies advanced semiconductor mask layouts for high-performance processors, collaborating with circuit teams to ensure tape-out readiness using industry-standard tools.
Designs and executes SoC verification for AMD’s next-gen ASIC and FPGA chips, writing testbenches in SystemVerilog/UVM and debugging failures to ensure bug-free silicon.
Oversee PCBA programs, coordinating with contract manufacturers and cross-functional teams to launch customer solutions on time and within budget while ensuring quality and alignment with engineering schedules.
Build and deploy AI agents that automate silicon IP design using RAG, agentic workflows, and EDA tool integration to accelerate spec-to-netlist pipelines.
Lead a team to design and optimize physical layouts for high-performance microprocessors, balancing power, performance, and area while using AI to boost productivity.
Build and optimize mathematical and statistical software for AMD’s AI and CPU platforms using C/C++, classical ML, and numerical algorithms.
Design high-speed analog/mixed-signal circuits for Serdes transceivers, including DACs, ADCs, PLLs, and clocking blocks, and guide silicon bring-up and validation.
Build predictive models, time-series forecasts, and generative-AI tools to optimize sales operations at a semiconductor/AI company using Python, SQL, and ML frameworks.
Lead AI cluster validation programs for GPU platforms, rack-level solutions, and scale testing, coordinating hardware, firmware, and networking teams to ensure system readiness for hyperscale and enterprise AI deployments.
Lead verification of AMD’s IOHUB subsystem, defining test plans and collaborating with global teams to ensure high-performance interconnect IP meets design specs.
Design verification engineer building PCIe interconnect IP testbenches using UVM/SystemVerilog to validate high-performance ASIC features for AMD’s GPUs, APUs, servers, and consoles.
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