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Lattice Overview There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers.…
Develop and maintain Linux PCIe device drivers and kernel modules for FuriosaAI's AI-native compute platform, optimizing DMA, IOMMU, and high-performance I/O pipelines.
Develops firmware/software for NPU management interfaces, handling communication between host systems and AI accelerators via protocols like MCTP/PLDM, while ensuring telemetry, health monitoring, and compliance with industry specs.
Design and deploy AI/LLM models on FuriosaAI’s RNGD NPU using the Furiosa SDK, running POCs, benchmarks, and debugging for US customers while translating technical capabilities into business value.
About FuriosaAI FuriosaAI builds high-performance, high-efficiency AI compute for the Inference Era. Founded in 2017 by veteran semiconductor and AI algorithm engineers, Furiosa operates globally with offices in Korea…
Designs end-to-end thermal solutions for AI hardware (NPU/ASIC to server chassis), balancing cooling methods (air/liquid/immersion) via CFD simulations and real-world testing to optimize performance and reliability.
Design and optimize signal/power integrity for AI hardware, running EM/circuit/system simulations and guiding chiplet/3D-IC layouts to ensure robust AI-native compute.
ОАО «Пеленг» — ведущее проектно-конструкторское предприятие оптико-электронной промышленности Республики Беларусь. Это более 50 лет инженерных побед и более 3500 специалистов, которые превращают научные исследования в…
Designs and executes verification strategies for AI hardware, ensuring functional correctness and coverage of block/system-level designs using SystemVerilog/UVM and Python-based tools.
Designs and optimizes AI hardware architectures, focusing on performance, power, and area (PPA) metrics. Uses Verilog, EDA tools, and scripting to perform synthesis, equivalence checking, and timing analysis for chip-level designs.
Hardware Design Verification Engineer at FuriosaAI responsible for defining and implementing verification plans, building test benches, and debugging design failures using SystemVerilog/UVM methodologies and EDA tools.
Designs and implements high-performance digital ASIC blocks for AI infrastructure connectivity chips, from RTL to backend, using Verilog/SystemVerilog and EDA tools.
HW Application engineer – Job description: Nuvoton Israel is a leading supplier of microcontrollers and security hardware solutions for tier-1 customers in the computing and servers business. It is a self-contained…
Principal Hardware Engineer designing and validating high-end routing platforms, collaborating with cross-functional teams on PCB design, signal integrity, power, and thermal considerations for mass production.
Sr. FPGA Engineer on Amazon's Leo satellite program developing FPGA-based modem solutions for high-speed optical communication links, spanning the full design lifecycle from RTL to silicon validation.
Embedded Linux Software Engineer developing kernel and PCIe drivers and embedded/host software for high-speed networking and photonics systems using C, C++, and Python on ARM platforms.
The FPGA Developer will design, implement, and test high-performance RTL for low-latency high-frequency trading strategies. The role requires expertise in VHDL/Verilog, FPGA debugging tools, and collaboration with software teams to optimize trading system performance.
Develops high-performance, real-time GPU-accelerated edge computing systems for defense and national security applications using C++, CUDA, and Linux.
Job Title: Embedded Linux Team Lead Location: Bengaluru Department: R&D Software Experience: 8–12 years (with strong hands-on background) Education: BE / BTech / ME / MTech – Computer Science, Electronics, or…
QualityAI is the leading AI-first quality engineering company. We deliver end-to-end quality management services across the business and technology life cycle for enterprise customers who need certainty at Go-Live. We…
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