Point your AI agent at freehire and let it find you a job. A CLI and an MCP server over the whole job API — no browser.
Principal Logic Design Engineer responsible for micro-architecture and RTL design of next-generation high-performance memory controllers for data centers and AI applications, using SystemVerilog/Verilog and collaborating with verification and physical design teams.
Designs and runs RTL validation for Intel’s IP blocks, using System Verilog and UVM to verify DDR5/LPDDR5 and debug failures before tape-out.
This role involves verifying and analyzing complex full-chip gate-level custom memory designs, including DDR and LPDDR architectures. The engineer will utilize AI-based tools, automation frameworks, and simulation environments to accelerate verification cycles and improve debug efficiency.
NVIDIA is seeking interns for a 12-week hardware verification program to work on projects involving GPU and processor architecture, functional testing, and digital design. Interns will utilize tools like SystemVerilog, UVM, and various simulation environments to support hardware validation efforts.
NVIDIA is seeking interns for 12-week hardware ASIC design roles, focusing on tasks like RTL design, verification, and physical design. Interns will work on projects impacting AI, robotics, and accelerated computing using tools like SystemVerilog, C++, and Python.
This role is for an RTL Design Team Lead to manage a hardware team and contribute hands-on to the development of complex FPGA and ASIC IP for 5G and satellite communications. The position involves technical leadership, team mentoring, and optimizing hardware designs for performance and power efficiency.
Designs and verifies FPGA logic for Microchip PolarFire SoCs using VHDL/Verilog, integrating with RISC-V cores and Linux/RTOS drivers.
Leads a team specializing in hardware/firmware co-verification for AMD’s security IP subsystems, including cryptography, compression, and DMA accelerators, using UVM/SystemVerilog and FPGA prototypes. Focuses on verification architecture, performance optimization, and team management for next-gen SoCs.
Design Verification Engineer builds SystemVerilog/UVM test environments to verify AI chip control, initialization, and state transitions for SambaNova’s RDU chip.
Role Overview We are seeking a highly experienced Design Verification Leader to lead the definition and execution of scalable, reusable, and high-quality verification strategies for next-generation SoCs targeting AI,…
Lead a team to verify Google’s TPU silicon, defining advanced verification flows and methodologies to ensure functional correctness and performance of AI hardware accelerators.
WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a…
ASIC Design Verification Engineer responsible for owning verification strategy, coverage closure, and system-level testing for AMD’s mixed-signal power management IP, including RTL design and collaboration with analog/firmware teams.
Leads verification of complex SoC subsystems (e.g., memory/cache, coherency, PCIe/DDR) using UVM/SystemVerilog, ensuring functionality, performance, and security. Owns test strategy, debugging, and cross-team collaboration for sign-off.
Design and verify custom silicon accelerators and SoCs for Google’s AI and hardware infrastructure using SystemVerilog, UVM, and formal methods.
Design and execute verification plans for a Physical AI SoC using SystemVerilog/UVM, C/C++, assertions, and emulation to validate compute engines, memory, and interconnects.
Join Bitdeer's IC development team to ensure the functional correctness and performance of computer arithmetic IPs. Develop comprehensive verification environments, execute test plans, debug RTL issues, and…
Leads ASIC/SoC design and verification for high-performance GPU/graphics workloads, architecting power-efficient digital/analog blocks from concept to deployment.
Für unseren Standort in Bonn suchen wir ab sofort eine:n Customer Service Manager (m/w/d) SIE WISSEN VIEL UND MÖCHTEN AM LIEBSTEN ALLES ANWENDEN? WIR BIETEN GROSSARTIGE CHANCEN FÜR LÖSUNGSFINDER. Willkommen im…
Senior ASIC verification engineerThis role has been designed as ‘’Onsite’ with an expectation that you will primarily work from an HPE office. Who We Are: Hewlett Packard Enterprise is the global edge-to-cloud company…
We couldn't check your fit for this role — add a CV to your profile to see it next time.