Point your AI agent at freehire and let it find you a job. A CLI and an MCP server over the whole job API — no browser.
Designs and implements high-performance digital ASIC blocks for AI infrastructure connectivity chips, from RTL to backend, using Verilog/SystemVerilog and EDA tools.
The Network Engineer will provide post-sales support for Arista networking deployments, focusing on designing and troubleshooting leaf-spine architectures, EVPN, VxLAN, and SD-WAN. The role involves network automation using Python and Ansible, as well as managing CI/CD pipelines for enterprise customers.
Quality Control Analyst Position Type: Full-Time, Permanent Department: Customer Care & Service – Strategy – Quality Control Work Location: North York Office - 20 Norelco Drive, North York, ON M9L 2X6 Work…
Principal Hardware Engineer designing and validating high-end routing platforms, collaborating with cross-functional teams on PCB design, signal integrity, power, and thermal considerations for mass production.
Sr. FPGA Engineer on Amazon's Leo satellite program developing FPGA-based modem solutions for high-speed optical communication links, spanning the full design lifecycle from RTL to silicon validation.
The Member of the Technical Staff will develop high-performance computing processor IP products by collaborating with global teams on architecture, design, verification, and implementation. The role requires expertise in RTL design, verification methodologies, and industry-standard EDA tools.
Lead Infrastructure Engineer supporting, maintaining, and automating critical market data platforms (LSEG RMDS, Bloomberg BPIPE, Solace, Geneos) for J.P. Morgan's trading business, using Linux, cloud infrastructure, networking, and AI-assisted workflows on a shift-pattern schedule.
VLSI Design Engineer responsible for designing cutting-edge communication systems from scratch, including micro-architecture definition, RTL coding in Verilog/SystemVerilog, synthesis, timing analysis, and PPA optimization, collaborating closely with verification, DFT, and physical design teams.
Lead Software Engineer designing and developing connected-vehicle backend services at Stellantis using Java, Spring Boot, MongoDB, Redis, Kafka, and AWS within a DevOps/CI-CD environment.
Salary: £45,000 - 85,000 per year Requirements: We require proven experience in customer support, including pre- and post-sales experience, with a strong track record. We require proficiency in English and French. We…
Salary: £63,000 - 103,000 per year Requirements: Working knowledge of Linux system administration and strong troubleshooting skills across application, network, and host levels Experience with systems automation using…
Salary: £63,000 - 103,000 per year Requirements: Advanced knowledge of Linux system administration Significant experience with systems automation using BASH, Python, Perl, or similar tools Significant experience with…
Methods Consulting is seeking a Java/Python Developer to work on system design and microservices. The role requires extensive experience with Java, Python, Spring, and relational database modeling.
SberData - департамент по управлению данными всего Сбербанка. SberData строит централизованное хранилище данных, объем которого уже превышает 100 ПБ. Это продуктово-ориентированная инженерная команда с функциями…
Manages Oracle databases for USSTRATCOM, handling installs, scripting, backups, security, and performance tuning in a DoD environment with TS/SCI clearance.
Maintain and optimize Sberbank’s internal Hadoop-based data platform (SDP Hadoop), troubleshoot Linux systems, and automate operations for a 100+ PB storage environment.
The Principal Cloud Engineer will architect and manage North's multi-cloud infrastructure, focusing on AIOps, automation, and security. This role involves building self-healing systems and CI/CD pipelines using AWS, Terraform, and AI-driven observability tools.
Builds and maintains Java/J2EE full-stack applications for a furniture care and repair business, focusing on cloud-based solutions, system integrations, and end-to-end project lifecycle from requirements to deployment.
The Design Verification Engineer will develop verification environments, test plans, and perform functional RTL testing at the IP and SoC levels. The role requires expertise in ASIC verification methodologies, SystemVerilog, and various communication protocols.
QualityAI is the leading AI-first quality engineering company. We deliver end-to-end quality management services across the business and technology life cycle for enterprise customers who need certainty at Go-Live. We…
We couldn't check your fit for this role — add a CV to your profile to see it next time.
