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Lead a team to architect and execute advanced verification strategies for next-gen semiconductor products using SystemVerilog, UVM, and emulation platforms.
Design/Verification Engineer applying AIML-enhanced methodologies to architect UVM testbenches, drive coverage closure, and automate RTL generation for complex digital ASIC/SoC designs from RTL to tapeout.
Senior Design Verification Engineer at HPE focused on emulation-based verification of complex digital designs, building UVM/SystemVerilog testbenches and running designs on platforms like Palladium, ZeBu, and Veloce.
The Software Engineer II will develop and validate CXL Verification IP, collaborating with global teams to create robust software solutions for hardware and SoC memory protocol verification. The role requires strong C/C++ modeling skills and experience with verification methodologies.
Technical leader validating advanced HBM memory products at Micron's Singapore fab — defining validation coverage strategies, leading debug and failure analysis of DRAM/HBM silicon, running circuit simulations, and guiding ATE test program development using Python/C/C++ and Verilog.
Edelman is a voice synonymous with trust, reimagining a future where the currency of communication is action. Our culture thrives on three promises: boldness is possibility, empathy is progress, and curiosity is…
Lead ASIC RTL Design Engineer — Remote (U.S.) - No visa sponsorship Role Summary Our client, a leader in AI Compute is seeking a senior-level ASIC design engineer to drive the development of high-performance silicon…
Senior ASIC Verification Engineer (AI Hardware) — Remote (U.S.) — No Visa Sponsorship Overview Our client an AI / Compute company of the verge of being the next Nvidia is looking for an experienced ASIC Verification…
Title: FPGA Verification Specialist - Tactical Communications Location: United States - Florida, Maryland, New York, Utah Company: L3Harris Technologies Seniority Level: Associate Minimum Education: Bachelor's…
Job Description: As a Hardware Engineer at our company, you will be responsible for architecture, design and development of next generation Electronic Safe and Arm Devices utilizing the latest state of the art…
Job Description Industry: Aerospace / Aviation / Defense Job Category: Engineering - Electrical We are seeking an Electrical Engineering Manager with an FPGA/Digital Design background to support our development of…
Ethernet Design Verification Engineer Role Summary: We are looking for an Ethernet DV Engineer to verify high-speed Ethernet IP and subsystems, ensuring full protocol compliance and functional correctness prior to…
Job Ref: QV79VR4R Title: Design Verification Engineer Location: Onsite in HCM City Requirements: 4+ years experience with Design Verification Strong experience with SystemVerilog Strong experience developing test…
Silicon Design Engineer Location: Bristol, Cambridge, or Manchester Overview: Join a cutting-edge technology team shaping next-generation mobile, smart, and connected solutions. As a Silicon Design Engineer ,…
Principal engineer owning verification for next-gen RDU silicon, developing testbenches with SystemVerilog/UVM/Python to validate AI hardware performance and logic.
Design Verification Engineer at Microsoft responsible for verifying components in cloud hardware, developing verification environments, and improving quality using UVM, formal methods, and generative AI.
Job description Fortaegis is a fast-scaling, highly ambitious and cutting-edge semiconductor company. We are looking for a Design Verification Engineer responsible for verifying RTL designs for FPGA and ASIC-based…
Orchestrates chip design and verification programs, standardizing workflows and automating EDA toolchains across Google’s engineering teams to accelerate next-gen semiconductor development using cloud and DevOps practices.
Job Overview: Join Arm's GPU Hardware Verification team in Ra’anana, Israel, and help shape the future of the world's most widely deployed GPU architecture — Mali™. As a Staff Hardware Verification Engineer,…
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