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Samsung Semiconductor
2 views last week

Principal Engineer, Hardware Emulation

New North AmericaPrincipal H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.
United States

A senior engineer who owns and maintains hardware emulation infrastructure (Palladium/Zebu platforms) for pre-silicon validation of mixed-signal networking SoCs — bringing up emulation platforms, developing monitors/checkers and workflows, debugging emulation performance and design issues, and working with simulation, firmware, and software teams. Onsite in San Jose.

AI Candidate Experience Firmware IoT Networking +5 skills
219K – 351K $
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SiFive India Private Limited
3 views last week

Staff RTL Design Engineer

Open 6d On-siteAPACStaff
Taiwan

A staff-level CPU microarchitecture/RTL design engineer at SiFive who architects, designs, and implements new features and ISA extensions in RISC-V CPU core generators, develops microarchitecture specs, performs initial verification, and collaborates with physical design and performance teams. Core stack: Verilog/SystemVerilog/VHDL RTL, with RISC-V and Scala/Chisel as pluses.

Machine Learning Rtl Scala Verilog VHDL
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Apple Backed by Sequoia
3 views last week

ASIC Design and Integration Engineer

New North America
United States

Imagine what you could do here. At Apple, new insights have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling…

Asic Generative AI Perl Python Tcl +1 skills
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Maury Microwave
2 views last week

Senior Digital Systems Engineer

New North AmericaFull-timeSenior H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.
United States

Senior Digital Systems Engineer - Job Description Your challenge Join a stimulating and innovative R&D environment where your contributions directly influence the next generation of satellite communication test &…

C++ Embedded Systems Ethernet FPGA PCIe +6 skills
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Renesas Electronics
3 views last week

Principal/Lead Digital Design Engineer (Power Management ICs)

New HybridNorth AmericaFull-timePrincipal
United States

Our team works on the most advanced digital power management ICs in the industry. This is an excellent full-time/permanent role giving the opportunity to work with an expert team pushing the envelope of digital design,…

Agile Automation I2c IoT Perl +2 skills
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Voltai
3 views last week

RTL Design Engineer

New North AmericaFull-time
United States

Design and own RTL for production silicon at Voltai — microarchitecture and SystemVerilog implementation for IP blocks, driving lint/CDC, synthesis, and timing closure, and debugging across simulation, emulation, and silicon, while helping train Voltai's AI to write and review chip designs.

AI Ethernet PCIe Python Rtl +3 skills
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Tenstorrent University
3 views last week

Systems Intern - Validation, Software, Design, Architecture & Packaging (USA)

New On-siteNorth AmericaInternshipIntern
United States

Tenstorrent is hiring systems interns (on-site in Austin, TX or Santa Clara, CA) matched to teams in silicon validation, system software, board design, architecture, or semiconductor packaging. Interns may write firmware/drivers in C/C++ and Python, run post-silicon chip testing, or work on PCB/packaging electrical, thermal, and mechanical design.

AI CAD C++ Embedded Systems Fea +5 skills
50 – 70 $ / hr
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Tenstorrent University
3 views last week

Systems Intern - Validation, Software, Design, Architecture & Packaging (Canada)

New On-siteNorth AmericaInternshipIntern
Canada

On-site internship in Toronto or Vancouver at Tenstorrent, matched to one of several hardware/systems teams: post-silicon chip validation, firmware/drivers/system software, board/system design & architecture, or semiconductor packaging. Work spans low-level C/C++/Python programming, lab testing of AI chips, and PCB, thermal, and mechanical design.

AI CAD C++ Embedded Systems Fea +5 skills
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Semiconductor_ (Malaysia)_ Sdn Bhd Taiwan Branch
2 views last week

Design Verification Manager

New On-siteNorth America
United States

Leads a geographically distributed IC design verification team at Semtech, building SystemVerilog/UVM testbenches and verification plans for mixed-signal chip blocks, driving coverage closure, regression testing, and mentoring engineers. Hybrid role in San Diego or San Jose; 10+ years of design verification experience required.

Automation CI/CD Firmware I2c Perl +7 skills
116K – 216K $
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Optiver
12 views last week

Graduate FPGA Engineer (2027 Start)

Open 70d EuropeInternshipJunior Licensed UK sponsor — This employer appears on the GOV.UK register of licensed sponsors for the Skilled Worker and related work routes. The licence belongs to the employer and is not a commitment to sponsor this role.H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.
Netherlands

Designs high-speed hardware solutions (FPGAs) for ultra-low-latency trading systems, collaborating with traders and engineers to optimize network infrastructure and algorithmic trading components using VHDL/Verilog.

AI FPGA Networking SystemVerilog Verilog +1 skills
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Tachyum s.r.o.
1 views last week

Systémoví analytici

New Europe
Slovakia

What you'll be doing Working on high performance L2 Cache unit serving the needs of state-of-the art AI processing elementsSkills required Requires 1 to 3 years of experience (will consider bright individuals even with…

AI Bash Perl Python Verilog
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ATS FAMILY
2 views last week

Electrical Engineer I - FPGA Designer (58060)

New North AmericaJunior
United States

Applied Technical Services, LLC, is a leading provider of critical testing, inspection, certification, and compliance services. The company serves clients across a diverse set of large and stable end markets including…

FPGA SystemVerilog Verilog VHDL
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ATS FAMILY
4 views last week

Senior Electrical Engineer - FPGA Designer (58061)

New North AmericaSenior
United States

Applied Technical Services, LLC, is a leading provider of critical testing, inspection, certification, and compliance services. The company serves clients across a diverse set of large and stable end markets including…

FPGA SystemVerilog Verilog VHDL
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Jobgether
6 views last week

FPGA Digital Design Engineer

New RemoteNorth AmericaFull-time

This position is listed on behalf of a partner company, which manages all applications and next steps. Our partner is looking for an FPGA Digital Design Engineer based in United States. As an FPGA Digital Design…

AI FPGA Gdpr Root Cause Analysis SystemVerilog +2 skills
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Renesas Electronics
last week

Principal Engineer - Design Verification

New APACPrincipal
India

We are seeking a diligent SoC/MCU Verification engineer to join our team at Renesas. The Verification engineer will be responsible for performing various verification tasks including Test Plan creation, Testcase…

Agile Bash C++ IoT Microcontrollers +6 skills
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Google Backed by Sequoia
5 views last week

Senior Silicon Design Verification Engineer, Mixed Signal

New APACSenior Licensed UK sponsor — This employer appears on the GOV.UK register of licensed sponsors for the Skilled Worker and related work routes. The licence belongs to the employer and is not a commitment to sponsor this role.Licensed NL sponsor — This employer appears on the IND public register of recognised sponsors for work and highly skilled migrants. The recognition belongs to the employer and is not a commitment to sponsor this role.Denmark Fast-track company — This company is certified by SIRI for the Danish Fast-track scheme for hiring foreign skilled workers. The certification belongs to the employer and is not a commitment to sponsor this role.
Taiwan

Senior engineer verifying digital and mixed-signal design blocks for Google's custom silicon in consumer hardware products — planning verification strategies, building UVM/SystemVerilog testbenches and coverage, and driving verification through tape-out from offices in New Taipei City or Zhubei, Taiwan.

AI Python SystemVerilog Uvm Verilog
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Alibaba Group
6 views last week

达摩院-高速模拟电芯片专家-先进互联

New APAC H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.
China

Designs high-speed analog driver and TIA chips (100G–400G per lane) for Alibaba DAMO Academy's advanced optical interconnects (NPO/CPO/OIO): architecture and transistor-level design, low-noise broadband amplification, co-design with photonic chips and photodetectors, EM/packaging parasitic extraction, plus lab characterization and BER testing. Key stack: SiGe BiCMOS, Cadence Virtuoso/Spectre/Calib

Cadence Virtuoso Cmos SerDes Verilog
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IMC Trading
7 views last week

Hardware Engineer

New APAC Licensed NL sponsor — This employer appears on the IND public register of recognised sponsors for work and highly skilled migrants. The recognition belongs to the employer and is not a commitment to sponsor this role.
Australia

Designs and deploys FPGA-based hardware for ultra-low-latency trading at a global market maker — building systems that parse market data and execute trades in nanoseconds. Core work spans VHDL/Verilog/SystemVerilog, FPGA toolchains like Vivado and Quartus, C++/Python, and performance tuning from transceivers to logic layout.

C++ Ethernet FPGA Machine Learning Networking +5 skills
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Alibaba Group
2 views last week

平头哥-DFT设计/DFT CAD开发高级工程师/专家-成都

APAC H-1B sponsor history — This employer has had H-1B petitions approved by USCIS in the last five fiscal years, per the USCIS H-1B Employer Data Hub. The approval belongs to the employer and is not a commitment to sponsor this role.
China

The candidate is expected to be responsible for following tasks: Participate in complex Chip DFT/DFD feature and architecture definition Implement DFT function including SCAN, Boundary SCAN, MBIST, Analog Macro test…

Asic CAD Perl Python Rtl +3 skills
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XG TECH PTE. LTD.
10 views last week

IC Design Engineer

Open 72d APAC
Singapore

Designs and implements RTL code and micro-architectures for digital IPs and SoCs in the automotive domain, following the full ASIC flow.

Asic Distributed Computing Python Rtl SystemVerilog +2 skills
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