Leads space-system programs for a defense tech company, coordinating engineering, logistics, and customer teams to deliver AI-powered satellite capabilities under national security contracts.
Designs and tests PCBs for spacecraft and space systems, including schematics, component selection, layout, and integration, using high-speed digital, analog, RF, and low-power techniques.
Designs and builds electrical test systems for avionics and power hardware on autonomous air vehicles, supporting lab, ground, and flight testing, design reviews, and root cause analysis. Key technologies include electrical harnessing design, bus interfaces like CAN, Ethernet, and MIL-STD-1553, and test software such as Python, PXI, cDAQ, and cRIO.
Senior Electrical Test Engineer develops and manages test systems for avionics, embedded processing, and power systems in military air platforms. Focuses on hardware/software integration, lab/flight testing, and troubleshooting for high-reliability defense systems.
A senior electrical engineer who designs and integrates electrical systems and harnesses for autonomous air vehicles and missile platforms, producing diagrams/ICDs, building and testing avionics in lab, ground, and flight tests, and performing root cause analysis. Core work spans CAN/Ethernet/RS422/RS232/MIL-STD-1553 bus interfaces and tools like Siemens Capital.
Digital Design Engineer at Anduril Industries developing FPGA and SoC platforms for high-performance embedded systems, avionics, and mission-critical hardware using RTL design in VHDL/Verilog/SystemVerilog.
Own verification of FPGA/SoC designs for flight-critical avionics using SystemVerilog and UVM methodology on AMD (Xilinx) platforms.
Designs and leads PCB layouts for defense tech, applying IPC standards and high-reliability practices in Altium Designer.
The Staff Software Engineer will lead a team in developing flight, ground, and payload software for spacecraft systems. This role involves architecting embedded and host-level software, managing the full development lifecycle, and mentoring engineers in a fast-paced defense environment.
Electrical Test Engineer on Anduril's Battlespace Awareness Radar team in Fort Collins, testing next-generation radar systems. The role involves integration and environmental testing of complex electrical subsystems (high-speed digital and RF), validating PCB performance, and building Python-based test automation alongside design engineers.
Senior FPGA Engineer at Anduril leading FPGA architecture, design, and verification for airborne radar systems in Colorado. Day to day: translating signal processing algorithms into high-performance FPGA implementations, establishing design processes and verification methodologies, and mentoring engineers using SystemVerilog/VHDL and Altera toolchains (Quartus/Vivado).
FPGA Engineer at Anduril designs and implements hardware solutions using Xilinx SoC and VHDL/Verilog for defense intelligence systems.
Senior FPGA/Digital Design Engineer on Anduril's Air Dominance and Strike team, designing and integrating RTL in VHDL/Verilog/SystemVerilog for FPGA and SoC platforms in flight-critical avionics for autonomous air vehicles. Work spans the full cycle: microarchitecture, RTL implementation, simulation, synthesis, timing closure, lab bring-up, and system integration.
Senior FPGA Verification Engineer at Anduril (Costa Mesa, CA) owns UVM-based, coverage-driven verification of FPGA/SoC designs on AMD (Xilinx) platforms for flight-critical avionics. Core tech: SystemVerilog, UVM, SVA, simulators like Questa/VCS/Xcelium/Vivado, with DO-254 safety standards.
Senior systems engineer who designs and runs integration & test campaigns for Intelligence Community hardware/software systems at Anduril: writing test plans and procedures, executing hardware-in-the-loop and end-to-end testing, automating test infrastructure and data analysis, troubleshooting networks, and managing multi-stakeholder test schedules. Core tech: test automation, HITL, networking, Py
A senior systems engineer who defines and documents system architectures and requirements for complex defense hardware/software/firmware systems, maintains requirements-to-test traceability, and owns the authoritative system model using MBSE tools like Cameo and SysML. Works with Intelligence Community customers on national security systems at Anduril.
Systems Engineer on Anduril's Intelligence Systems team who designs, executes, and automates test plans and hardware-in-the-loop, end-to-end testing of integrated hardware/software products for Intelligence Community programs. Core work spans networking configuration/troubleshooting, requirements traceability, test automation, and reporting results, requiring an active U.S. Secret clearance.
Systems engineer who owns requirements management for complex hardware/software defense systems — defining architectures, documenting and allocating requirements, and maintaining traceability through tests. Core tools include Cameo Systems Modeler and SysML, with a push toward next-generation agentic modeling and automated engineering workflows. Requires an active U.S. Secret clearance.
Senior/Staff FPGA Engineer on Anduril's Electronic Warfare team, owning end-to-end FPGA design and verification for software-defined radio platforms on AMD/Xilinx SoC/FPGAs — writing VHDL DSP modules, integrating subsystems, and developing drivers for custom RF boards. Core stack: VHDL/Verilog, AMD/Xilinx tools, DSP, high-speed interfaces, Linux, and Git/CI workflows.
Senior embedded software engineer on Anduril's Electronic Warfare team building the software ecosystem for a next-gen EW platform: high-performance numerical algorithms for RF data, hardware/software interfaces with RF hardware, and deployment tools for DSP/RFML engineers, integrated with the Lattice system. Core stack includes Haskell or Rust, software-defined radio, Linux, and optionally FPGA/MA
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