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Prozesse verstehen. Zukunft effizienter machen. Logistics with purpose. Als Materials Manager bei Hilti gestaltest du die zuverlässige Verfügbarkeit eines umfangreichen und vielfältigen Produktportfolios. Du verstehst…
About Sandia Sandia National Laboratories is the nation’s premier science and engineering lab for national security and technology innovation, with teams of specialists focused on cutting-edge work in a broad array of…
Building Name: UVMMC - Medical Center - Main Campus Location Address: 111 Colchester Avenue, Burlington Vermont Regular Department: Emergency Department - A Shift: Night-12Hr Salary Range: Min $41.39 Mid $55.27 Max…
Building Name: PMC - Porter Medical CenterLocation Address: 115 Porter Drive, Middlebury VermontRegularDepartment: Porter - Laundry & Environmental ServicesFull TimeStandard Hours: 40Biweekly Scheduled Hours:…
Designs low-power digital circuits for brain-computer interfaces, including processors, accelerators, and radio components, using SystemVerilog, C/C++, and Python.
Design Verification Engineer at Microsoft responsible for verifying components in cloud hardware, developing verification environments, and improving quality using UVM, formal methods, and generative AI.
proteanTecs is hiring a Senior Application Engineer (Design Verification) in Santa Clara to act as the primary technical interface for North American customers, helping integrate its chip-health monitoring IP and DV flows, debugging RTL/gate-level issues, and relaying customer feedback to R&D. Core stack: SystemVerilog/UVM, testbench architecture, SoC verification, and DFT.
About Rivian Rivian is on a mission to keep the world adventurous forever. This goes for the emissions-free Electric Adventure Vehicles we build, and the curious, courageous souls we seek to attract. As a company, we…
ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies…
Lead Engineer guiding a team that builds embedded software (Embedded Linux, RTOS/Zephyr, bare-metal STM32 microcontrollers) for Güntner's refrigeration and climate-control products and IoT solutions. Day to day: driving architecture and design decisions, breaking down complex requirements, hands-on debugging/prototyping, and coaching developers.
In unserem Sales & Partnerships Team kreieren wir das gesamte Jahr über exklusive Partner-Events und passgenaue Live-Formate für verschiedenste Marken. Rund um das OMR Festival mit zuletzt über 67.000…
Sparringspartner des Programm Managers Nachverfolgung von Kosten, Investitionen (Capex), Tooling, Launch- und Serienentwicklungsaktivitäten Durchführung von Cost Studies, einschließlich Make-or-Buy-Analysen,…
**Dein Erfolgsbeitrag:** Du qualifizierst deine Leads eigenständig anhand unseres Zielkundenprofils (ICP) und der SPICED-Methode und entscheidest, ob und wie Du die Opportunity weiter verfolgst Du erfragst gezielt die…
About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative…
Job Title Senior FPGA Developer Job Description Job Description: The role will focus on FPGA architecture, design, verification, and integration for CT. You will work closely with CT control architects, embedded…
Date Posted: 2026-09-30

 Country: United States of America

 Location: US-IN-FT WAYNE-150A ~ 1010 Production Rd ~ BLDG 150A

 Position Role Type:…
Principal Design Verification Engineer at SpaceX to develop and verify next-generation ASICs for Starlink satellites and ground infrastructure, ensuring high-performance connectivity in space and global networks.
Principal Design Verification Engineer at SpaceX designs, verifies, and validates next-generation ASICs and FPGAs for Starlink’s satellite and ground infrastructure, ensuring high-performance connectivity.
Designs and verifies next-generation ASICs for SpaceX’s Starlink network, using SystemVerilog, UVM, and Python to ensure reliable satellite and ground infrastructure connectivity.
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