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About Ethernovia, Inc. Ethernovia is developing the future of Ethernet-based networks to realize the full potential of software-defined and autonomous vehicles, robotics and other intelligent machines. Founded in 2018,…
Principal Logic Design Engineer responsible for micro-architecture and RTL design of next-generation high-performance memory controllers for data centers and AI applications, using SystemVerilog/Verilog and collaborating with verification and physical design teams.
The Staff Analog Design Engineer will own the transistor-level design of high-speed SerDes transmit and receive datapath blocks for AI inference accelerators. This role involves the full design lifecycle from specification and simulation to silicon characterization using tools like Cadence Virtuoso, MATLAB, and Python.
Staff Analog Design Engineer responsible for transistor-level design of clocking subsystems in high-speed SerDes on IO chiplets, including PLL, DLL, phase interpolator, clock distribution, and CDR loop. Work spans design, simulation, verification, and silicon characterization using tools like Cadence Virtuoso and Spectre.
Designs and runs RTL validation for Intel’s IP blocks, using System Verilog and UVM to verify DDR5/LPDDR5 and debug failures before tape-out.
Are you looking for a unique opportunity to be a part of something great? Want to join a 17,000-member team that works on the technology that powers the world around us? Looking for an atmosphere of trust, empowerment,…
Lead hardware design for next-gen hyperscaler switches using Silicon One/ASIC and CPU subsystems, defining specs, schematics, and system bring-up while collaborating with cross-functional teams.
Design and bring up next-gen hyperscaler switches using Silicon One/merchant ASICs and CPUs, collaborating with cross-functional teams to resolve hardware issues and validate systems.
The Semiconductor Design Engineer designs and analyzes digital and analog circuits for memory products, managing layout, verification, and simulation processes. The role involves collaborating with cross-functional teams to optimize manufacturing and ensure product quality using tools like Cadence Virtuoso, SPICE, and various hardware description languages.
The Engineer will contribute to DRAM design verification by developing test benches, test cases, and simulation flows. The role focuses on leveraging AI-based tools and automation to improve verification efficiency and debug capabilities for memory architectures.
This role involves verifying and analyzing complex full-chip gate-level custom memory designs, including DDR and LPDDR architectures. The engineer will utilize AI-based tools, automation frameworks, and simulation environments to accelerate verification cycles and improve debug efficiency.
NVIDIA is seeking interns for a 12-week digital circuit design program focused on hardware development for accelerated computing. Interns will work on projects involving circuit design, simulation, and optimization using tools like Verilog, Python, and industry-standard EDA software.
A 12-week full-time internship in Mixed-Signal Design at NVIDIA, where students contribute to hardware projects impacting industries like AI, robotics, and healthcare. Core focus: analog circuit design, simulation, and hardware testing.
NVIDIA is seeking interns for a 12-week hardware verification program to work on projects involving GPU and processor architecture, functional testing, and digital design. Interns will utilize tools like SystemVerilog, UVM, and various simulation environments to support hardware validation efforts.
NVIDIA is seeking Ph.D. students for hardware research internships focused on circuit design, ASIC/VLSI development, and electronic design automation (EDA). Interns will collaborate with research teams to develop prototypes and publish original research in areas like ML accelerators, memory design, and high-speed signaling.
NVIDIA is seeking interns for 12-week hardware ASIC design roles, focusing on tasks like RTL design, verification, and physical design. Interns will work on projects impacting AI, robotics, and accelerated computing using tools like SystemVerilog, C++, and Python.
NVIDIA offers 12-week hardware engineering internships for students pursuing degrees in electrical or computer engineering. Interns work on projects across system validation, hardware design, mechanical engineering, and silicon solutions using tools like Python, Verilog, and various CAD software.
This role is for an RTL Design Team Lead to manage a hardware team and contribute hands-on to the development of complex FPGA and ASIC IP for 5G and satellite communications. The position involves technical leadership, team mentoring, and optimizing hardware designs for performance and power efficiency.
This role involves leading the architecture and development of embedded firmware and FPGA logic for complex medical instrumentation platforms. The engineer will work with ARM-based SoCs, Linux BSPs, and high-speed data interfaces to optimize system performance in a laboratory environment.
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