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Software Engineer on the AI Models/System Bring-Up team responsible for porting, validating, and optimizing AI models on Tenstorrent platforms. Core technologies include PyTorch, TensorFlow, JAX, Python, C++, and Linux environments.
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify…
Designs high-performance SoC and RTL components for AI chips using Verilog/VHDL, optimizing for power, performance, and area while collaborating across teams.
Lead the definition and RTL implementation of datacenter-class System IP (MMUs, interconnects, memory controllers, peripherals) for Tenstorrent's next-generation AI/RISC-V SoCs. Hands-on technical leadership in Verilog/SystemVerilog with protocols like AXI, PCIe, DDR, and USB, based hybrid in Bangalore.
Design RTL for power management, interrupt controllers, and interconnects in RISC-V/ARM SoCs, optimizing for performance and power efficiency.
Leads end-to-end software development for a next-gen chiplet-based SiP in AI and CPU domains, spanning architecture, tape-out, silicon debug, and productization across pre- and post-silicon stages.
Maintain and troubleshoot cutting-edge AI hardware systems in R&D labs and data centers, supporting servers, PCIe devices, and prototype platforms for next-gen compute.
Build and operate CI/CD infrastructure and observability platforms for AI hardware and software development, diagnosing complex hardware/software issues.
Define next-gen chiplet-based CPU architectures for high-performance RISC-V systems, owning PCIe, die-to-die links, and system management while collaborating with hardware, software, and IP partners.
Designs, deploys, and maintains the high-performance data center network backbone for Tenstorrent's global AI compute infrastructure, using modern leaf-spine architectures and automation tools.
Design Verification Engineer builds and runs tests for AI-native compute cores and RISC-V CPUs using SystemVerilog, Python, and CI pipelines to ensure hardware correctness before tape-out.
Own Tenstorrent’s unified developer platform: firmware, system software, packaging, and updates, delivered via a single CLI that spans bare-metal bring-up to production model serving.
Firmware Engineer focused on low-level C/C++ development, board bring-up, and boot/power/reset sequences for microcontrollers and SoCs, collaborating with hardware and system software teams on AI platform hardware.
Senior ASIC design methodology engineer advancing RTL development, verification, and physical implementation flows for Tenstorrent's Tensix AI compute cores — owning static analysis (Lint, CDC, RDC, DFT), logic equivalency, SDC/UPF development, and RTL-to-GDS enablement. Hybrid role based in Toronto, ON.
Senior Clinical Data Engineer at MiniMed (diabetes medical devices) in Madrid, building and optimizing data pipelines with Databricks, PySpark, SQL, AWS and Redshift to turn clinical and device data into analysis-ready datasets for clinical research and biostatistics teams.
A staff-level LiDAR systems engineer who architects, specifies, tests, and validates LiDAR sensors for Aurora's self-driving platform. Day to day: own sensor requirements, evaluate COTS LiDAR technology, run on-vehicle data collection and data/root-cause analysis, and coordinate with hardware, software, and validation teams.
Senior Integration & Test Engineer at Cowboy Space owns end-to-end validation of satellite hardware and avionics systems in San Carlos, CA — bringing up and debugging electrical systems, building test infrastructure (racks, fixtures, harnessing), developing automated test procedures (Python), and running environmental/functional testing from prototype through flight and launch readiness.
Develops and maintains firmware for satellite hardware, including board bring-up, FPGA logic, and autonomous recovery systems to ensure reliable operation in orbit.
Senior Compute Validation Engineer at Cowboy Space Corp., ensuring robust hardware systems for orbital satellites, collaborating cross-functionally, and driving validation strategies.
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