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The Platform Engineer II will support the development of radar software by maintaining CI/CD pipelines, managing development infrastructure, and integrating security best practices. The role requires active Secret security clearance and proficiency in Linux, scripting, and configuration management tools.
Date Posted: 2026-08-26

 Country: United States of America

 Location: US-FL-MELBOURNE-312 ~ 795 W Nasa Blvd ~ BLDG 312

 Position Role Type: Onsite

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Monitor, maintain, and optimize a wide range of systems and infrastructure to ensure peak performance and availability. Act as the single point of contact for customers, coordinating seamlessly with internal teams to…
The GPU Digital Frontend Design Engineer will define microarchitecture, design RTL for high-performance GPU/AI accelerator chips, and optimize for power, performance, and area. The role involves collaborating with verification, software, and physical design teams using Verilog/SystemVerilog and standard EDA tools.
The SoC Digital Design Engineer will design and implement hardware accelerators for video codecs and SoC subsystems using Verilog/SystemVerilog. The role involves architecture definition, RTL implementation, and cross-functional collaboration to optimize power, performance, and area for large-scale video platforms.
About this role: Wells Fargo is seeking a Senior Trading Application Support Engineer (Rates & FX) to join the team in Singapore. This is a VP-level, individual contributor position. In this role, you will: Provide…
DevSecOps/CI/CD/IaC Engineer automating software delivery pipelines, infrastructure provisioning, and security controls across AWS cloud data environments for a federal courts modernization program.
The Principal Engineer will develop and optimize Resolution Enhancement Techniques (RET) and Optical Proximity Correction (OPC) solutions to improve wafer patterning for advanced memory technologies. The role involves leading mask development projects, collaborating across R&D and manufacturing, and mentoring engineers in lithography optimization.
This role involves automating software delivery, infrastructure provisioning, and security controls for the Case Management Modernization program using AWS, CI/CD pipelines, and Infrastructure as Code. The engineer will integrate security into the full lifecycle while optimizing cloud data platform performance and reliability.
The Principal Software Engineer provides technical leadership for complex mission software systems, overseeing development teams and ensuring high-quality engineering standards. The role involves designing, developing, and integrating software solutions across various technical environments including Linux, cloud platforms, and distributed data systems.
This entry-level role involves developing and verifying digital ICs and SoCs for aerospace and defense applications. Engineers will work on FPGA/ASIC design, simulation, and hardware integration using industry-standard tools and HDL languages.
Designs, develops, and supports Workday-based applications, focusing on integrations and custom solutions. Leads technical projects, ensures security compliance, and provides L3 support for complex business systems.
The ASIC Design Engineer 2 will work on high-speed networking chips, handling tasks from functional specification to final netlist. The role involves RTL coding, timing closure, and debugging using System Verilog and state-of-the-art EDA tools.
The ASIC Design Engineer 2 will contribute to the development of high-speed networking chips by performing RTL coding, micro-architecture specification, and timing closure. This role involves working with state-of-the-art EDA tools to design and debug complex silicon modules for routers and switches.
Technical Architect at Equifax designing and planning technology solutions for moderately large or complex projects, leveraging cloud services (AWS/GCP), multiple programming languages (Python, Java, JavaScript), microservices, and event-driven architectures on a hybrid schedule in Santiago.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job Profile Role Title Lead Design Engineer, SoC / Subsystem / IP Design Experience 4to 18 years…
Design Verification Engineer responsible for developing verification plans, test benches, and running regressions to ensure first-pass silicon success for analog and mixed-signal ICs at Texas Instruments in Dallas.
Where Ambition Meets Innovation Build a career that matches all your initiative with an impressive dose of innovation. From cutting-edge resources and a collaborative environment to the freedom to make an impact and…
Designs and implements ETL pipelines to extract, transform, and load data between systems, collaborating with PMs, BAs, and DBAs to ensure seamless data integration across Unix/Linux environments using Informatica, Python/Perl, and RDBMS tools.
Builds and leads fraud detection systems to protect Audible’s global marketplace from abuse, piracy, and fraud via rule engines, ML models, and real-time data pipelines.
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