Point your AI agent at freehire and let it find you a job. A CLI and an MCP server over the whole job API — no browser.
This role involves developing and sustaining FPGA firmware and embedded software for flow cytometry instruments, focusing on high-throughput data acquisition and hardware control. The engineer will work with Verilog/SystemVerilog and embedded systems to ensure reliable instrument performance in a laboratory environment.
Own SSD firmware verification plans, drive test strategy and automation, and perform root-cause analysis on NAND/firmware/system-level issues for enterprise and automotive SSD products using Python, PCIe, NVMe, and CI/CD tooling.
The Staff/Principal Security Engineer will define and lead end-to-end security validation strategies for SSD firmware, including threat modeling, test automation, and root cause analysis. The role requires deep expertise in storage security protocols and embedded systems to ensure the security integrity of next-generation SSD products.
Designs and verifies PCIe controllers for NVIDIA’s GPUs/SOCs using UVM/Specman/e, building reusable testbenches and ensuring correctness via coverage-based methodologies.
This role involves modernizing U.S. Navy sonar training systems by migrating hardware-based solutions to a virtualized Linux platform. The engineer will utilize RHEL, KVM, Python, and Ansible to design, deploy, and maintain these complex simulation environments.
Lead Software Engineer designing, developing, and testing embedded computing software for US DoD and secure aerospace/defense applications using C/C++, Linux, VxWorks, and related embedded toolchains on Intel x86, ARM, and AMD Zynq platforms.
What success looks like in this role: Unisys Corporation is seeking an experienced On-Site Service Engineer (OSE) to provide hands-on support for enterprise data center servers and hardware environments , including…
AI Infrastructure Engineer managing multi-GPU compute clusters, high-performance networking/storage, and IaC automation for AI/ML workloads using Kubernetes, Slurm, Terraform, and NVIDIA GPU technologies.
Own FPGA firmware and embedded software for flow cytometry instruments, sustaining legacy Verilog/SystemVerilog codebases and building real-time acquisition pipelines on FPGA with embedded Linux/RTOS integration.
Designs and maintains high-density GPU clusters for AI/ML workloads, focusing on compute, networking, storage, and automation to optimize distributed training performance.
Manage and optimize high-density multi-GPU compute clusters, high-performance networking/storage fabrics, and IaC automation pipelines for AI/ML distributed training workloads on Linux.
Architect and maintain multi-GPU compute clusters for AI/ML workloads, covering Kubernetes/Slurm orchestration, high-performance InfiniBand/RoCE networking, parallel storage, and IaC automation with Terraform/Ansible on Linux.
AI Infrastructure Engineer managing on-site multi-GPU compute clusters, high-performance networking/storage, and IaC automation to support distributed AI/ML training workloads in Singapore.
Develop and maintain automation frameworks for SSD firmware development, validation, and release at Micron in Singapore, using Python, Linux, CI/CD pipelines, databases, and data visualization tools.
Designs and develops FPGA-based digital solutions for aerospace/defense systems, including RTL architecture, verification, timing closure, and system integration. Works in Agile teams, mentors junior engineers, and collaborates on mission-critical hardware projects requiring security clearance.
Senior FPGA Engineer designing and implementing ultra-low-latency FPGA architectures for real-time motion control, machine vision, and distributed EtherCAT-based automation platforms, using VHDL/Verilog/SystemVerilog on AMD/Xilinx or Intel/Altera devices.
Develops agent systems for NVIDIA’s GPU fleet to collect health, telemetry, and attestation data across Linux hosts, bare metal, and Kubernetes nodes, contributing to open-source software for cloud-scale GPU infrastructure.
Principal Test Development Engineer leading firmware validation strategy, Python-based automation frameworks, and failure analysis for enterprise NVMe SSD products at Micron.
QA engineer responsible for comprehensively testing PCIe switch solutions—validating functionality, performance, and compliance across configurations—using Python-based test automation and deep PCIe protocol expertise (Gen3+).
Staff Interface IP Verification Engineer (Pre-Silicon) We Are Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver…
We couldn't check your fit for this role — add a CV to your profile to see it next time.