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Design and verify low-latency FPGA logic in Verilog/SystemVerilog for high-frequency trading systems, using AI tools to accelerate development and debugging.
Senior DSP Firmware Engineer | Contract | Hybrid | Stevenage The Role Design, simulate and implement DSP algorithms for advanced communications and sensing systems. Develop, test and verify FPGA firmware using VHDL…
Design and verify FPGA-based hardware for Dolby’s cinema servers, audio processors, and HDR projection systems using VHDL/Verilog/SystemVerilog and coverage-driven verification.
Design and verify firmware for calibrating high-speed DDR/LPDDR memory interfaces on FPGAs, integrating with Quartus Prime and collaborating across hardware/software teams.
AST SpaceMobile is building the first and only global cellular broadband network in space to operate directly with standard, unmodified mobile devices based on our extensive IP and patent portfolio and designed for…
Design, architect, develop, and launch next-generation display technologies in Apple products. The Display team develops cutting-edge display solutions and technologies that are central to Apple’s products. The key…
Designs and verifies RTL logic for mixed-signal SoCs in data-center applications using Verilog/SystemVerilog.
Team Credo is looking for a Principal Design Engineer to join our mission to transform connectivity at scale. In this role, you will be responsible for the RTL architecture, design, implementation, and verification of…
Design and validate FPGA logic for high-speed networking products using Verilog, Quartus/Vivado, and system integration tools.
Principal Engineer leads hardware failure analysis for HPE networking products, diagnosing complex issues in CPUs, ASICs, and high-speed signals to drive corrective actions and mentor teams.
Designs and develops high-performance PCB and system architectures for AI/HPC networking hardware, collaborating with cross-functional teams to bring up and qualify next-gen Fabric platforms.
Designs and implements FPGA-based prototypes for ASIC validation using Verilog, high-speed interfaces, and Quartus Prime Pro, collaborating with cross-functional teams to optimize timing and debug hardware.
Overview: Draper is an independent, nonprofit research and development company headquartered in Cambridge, MA. The 2,000+ employees of Draper tackle important national challenges with a promise of delivering successful…
Lead FPGA architecture design for power-electronics control systems, mentoring engineers and owning firmware from requirements to RTDS validation.
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into…
Senior engineer designing and optimizing RTL for DRAM digital and mixed-signal blocks, collaborating across teams to meet PPA targets using Verilog/SystemVerilog and synthesis/STA flows.
Designs and verifies FPGA-based control logic for aerospace engine controllers and avionics, using VHDL/Verilog and tools like Xilinx Vivado.
Design engineer role building next-gen storage and memory controller SoCs, owning IO/pad-ring planning and physical-design hand-off for high-performance data-center products.
Lead verification of high-bandwidth memory (HBM) and DRAM designs using SystemVerilog/UVM, ensuring functional correctness and performance for Micron’s memory products.
Designs and implements RTL code and micro-architectures for digital IPs and SoCs in the automotive domain, following the full ASIC flow.
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