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An Electrical/Camera Test Engineer at a defense technology company who owns production testing for camera/infrared systems: hands-on troubleshooting of complex issues, root cause analysis of failures, maintaining test equipment and test flow, and developing test automation, data analytics, and reporting in Python/MATLAB.
Electrical Test Engineer on Anduril's Battlespace Awareness Radar team in Fort Collins, testing next-generation radar systems. The role involves integration and environmental testing of complex electrical subsystems (high-speed digital and RF), validating PCB performance, and building Python-based test automation alongside design engineers.
Anduril Industries is hiring a Hardware (Laser/Camera) Test Engineer in Lexington, MA to own production testing of infrared/laser-camera systems: troubleshooting failures, writing test work instructions for technicians, root-cause analysis, and building test automation and data analytics tooling. Core tech includes Python, MATLAB, test automation, and hardware communication protocols; U.S. Secret
Designs and develops training curricula and content (eLearning, workshops) for quality management systems (AS9100/ISO 9001) at a defense technology company, ensuring compliance and workforce competency.
Designs, delivers, and continuously improves training and development programs for Anduril's Quality organization — building onboarding, skills curricula, and learning pathways that drive QMS adoption. Requires expertise in quality management systems, AS9100, ITAR/EAR, and CMMC in a regulated defense/aerospace environment.
PCB Layout Specialist at Anduril's radar team designs and routes high-reliability, high-speed mixed-signal PCBs (digital, analog, RF, power) for next-generation radar systems, collaborating with engineers and fab/assembly houses while setting DFM/DFA and library standards using Altium Designer. Requires U.S. Secret clearance eligibility.
Senior quality systems program manager who aligns Anduril's manufacturing, engineering, and field sites under one AS9100/ISO 9001-compliant quality management system. Day to day they run site assessments and maturity evaluations, maintain a site risk register, and lead cross-site rollout of QMS processes, requiring up to 50% travel.
Red Team Engineer on Anduril's Discovery team acts as the adversary to Anduril's own defense systems - hunting failure modes, breaking models, and pressure-testing trade studies across space, missiles, air, autonomy, and sensors. The work is hands-on physics/math modeling and simulation using MATLAB, Simulink, and Python.
Acts as the in-house adversary for Anduril's defense programs: independently builds models and simulations to find failure modes, verify others' analyses, and pressure-test designs across space, missiles, air, autonomy, and sensors. Core stack is physics-math scripting (MATLAB/Simulink, Python with numpy/scipy) plus tools like STK and AFSIM; requires an active Top Secret clearance.
Senior engineer on Anduril's Maritime team who picks up field-reported anomalies on autonomous underwater/surface vehicles, reproduces them, finds root causes, and ships real fixes across the codebase, later owning subsystems and roadmap. Core tech: Rust, C++, Python, Go, Linux, and Prometheus/Grafana- and Loki/ELK-class observability.
FPGA Engineer at Anduril designs and implements hardware solutions using Xilinx SoC and VHDL/Verilog for defense intelligence systems.
Anduril Industries is a defense technology company with a mission to transform U.S. and allied military capabilities with advanced technology. By bringing the expertise, technology, and business model of the 21st…
Senior FPGA/Digital Design Engineer on Anduril's Air Dominance and Strike team, designing and integrating RTL in VHDL/Verilog/SystemVerilog for FPGA and SoC platforms in flight-critical avionics for autonomous air vehicles. Work spans the full cycle: microarchitecture, RTL implementation, simulation, synthesis, timing closure, lab bring-up, and system integration.
Senior FPGA Verification Engineer at Anduril (Costa Mesa, CA) owns UVM-based, coverage-driven verification of FPGA/SoC designs on AMD (Xilinx) platforms for flight-critical avionics. Core tech: SystemVerilog, UVM, SVA, simulators like Questa/VCS/Xcelium/Vivado, with DO-254 safety standards.
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